文件名称:cide_c2

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 9.15mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 蒋**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

以太网芯片dm9000a测试,程序配置了DM9000a,使该芯片完成以太网口的数据发送。-The Ethernet chips DM9000A test, the program is configured DM9000a, allows the chip to complete the Ethernet port to send data.
(系统自动生成,下载前可以参看下载内容)

下载文件列表

cide_c2\DCMotorA.vhd

.......\DCMotorB.vhd

.......\PLL.bsf

.......\PLL.cmp

.......\PLL.ppf

.......\PLL.qip

.......\PLL.vhd

.......\PLL_wave0.jpg

.......\PLL_waveforms.html

.......\RS232.vhd

.......\RS485.vhd

.......\RS485_nRE_DE.vhd

.......\button_pio.vhd

.......\cide_c2.asm.rpt

.......\cide_c2.bdf

.......\cide_c2.done

.......\cide_c2.dpf

.......\cide_c2.eda.rpt

.......\cide_c2.fit.rpt

.......\cide_c2.fit.smsg

.......\cide_c2.fit.summary

.......\cide_c2.jdi

.......\cide_c2.map.summary

.......\cide_c2.pin

.......\cide_c2.pof

.......\cide_c2.qpf

.......\cide_c2.qsf

.......\cide_c2.qsf.bak

.......\cide_c2.sof

.......\cide_c2.sta.rpt

.......\cide_c2.sta.summary

.......\cide_c2.tan.rpt

.......\cide_c2.tan.summary

.......\cpu.ocp

.......\cpu.sdc

.......\cpu.vhd

.......\cpu_ic_tag_ram.mif

.......\cpu_jtag_debug_module_sysclk.vhd

.......\cpu_jtag_debug_module_tck.vhd

.......\cpu_jtag_debug_module_wrapper.vhd

.......\cpu_ociram_default_contents.mif

.......\cpu_rf_ram_a.mif

.......\cpu_rf_ram_b.mif

.......\cpu_test_bench.vhd

.......\cymometer.vhd

.......\cymometer_avalon_interface.v

.......\cymometer_register_file.v

.......\cymometer_task_logic.v

.......\dm9000a.vhd

.......\filter_200us.bsf

.......\filter_200us.v

.......\filter_20ms.v

.......\gx_avalon_isp1362.v

.......\gx_lcd_1095r_rst.vhd

.......\i2c.vhd

.......\i2c_master_bit_ctrl.vhd

.......\i2c_master_byte_ctrl.vhd

.......\i2c_master_top.vhd

.......\i2c_scl.vhd

.......\i2c_sda.vhd

.......\isp1362.vhd

.......\jtag_uart.vhd

.......\key_INT_n.vhd

.......\key_filter.bdf

.......\key_filter.bsf

.......\lcd_16207.vhd

.......\led_pio.vhd

.......\nios2_c2.bsf

.......\nios2_c2.ptf

.......\nios2_c2.ptf.bak

.......\nios2_c2.ptf.pre_generation_ptf

.......\nios2_c2.qip

.......\nios2_c2.sopc

.......\nios2_c2.sopcinfo

.......\nios2_c2.vhd

.......\nios2_c2_clock_0.vhd

.......\nios2_c2_clock_1.vhd

.......\nios2_c2_clock_2.vhd

.......\nios2_c2_generation_script

.......\nios2_c2_log.txt

.......\nios2_c2_setup_quartus.tcl

.......\oc_i2c_master.vhd

.......\onewire_io.vhd

.......\onewire_nCE.vhd

.......\onewire_sclk.vhd

.......\sdram.vhd

.......\sdram1.vhd

.......\sdram1_test_component.vhd

.......\sdram_test_component.vhd

.......\seg_key_scl.vhd

.......\seg_key_sda.vhd

.......\sopc_builder_log.txt

.......\speed_cymometer.vhd

.......\step_motor.vhd

.......\sysid.vhd

.......\workspace\.metadata\.lock

.......\.........\.........\.log

.......\.........\.........\version.ini

.......\.........\.........\.plugins\org.eclipse.ui.workbench.texteditor\dialog_settings.xml

.......\.........\.........\........\........................\dialog_settings.xml

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