文件名称:EPM7064-SR-Motor
介绍说明－－下载内容均来自于网络，请自行研究使用
CPLD EPM7064上编的开关磁阻电机换相逻辑-CPLD EPM7064，to control SR motor
(系统自动生成,下载前可以参看下载内容)
下载文件列表
CPLD
....\CPLD1.bdf
....\CPLD1.qpf
....\CPLD1.qsf
....\CPLD1.qws
....\db
....\..\CPLD1.db_info
....\..\CPLD1.eco.cdb
....\..\CPLD1.sld_design_entry.sci
....\..\db
....\..\..\prev_cmp_Vhdl1.asm.qmsg
....\..\..\prev_cmp_Vhdl1.fit.qmsg
....\..\..\prev_cmp_Vhdl1.map.qmsg
....\..\..\prev_cmp_Vhdl1.qmsg
....\..\..\prev_cmp_Vhdl1.sim.qmsg
....\..\..\prev_cmp_Vhdl1.tan.qmsg
....\..\..\Vhdl1.asm.qmsg
....\..\..\Vhdl1.cbx.xml
....\..\..\Vhdl1.cmp.cdb
....\..\..\Vhdl1.cmp.hdb
....\..\..\Vhdl1.cmp.logdb
....\..\..\Vhdl1.cmp.rdb
....\..\..\Vhdl1.cmp.tdb
....\..\..\Vhdl1.cmp0.ddb
....\..\..\Vhdl1.dbp
....\..\..\Vhdl1.db_info
....\..\..\Vhdl1.eco.cdb
....\..\..\Vhdl1.eds_overflow
....\..\..\Vhdl1.fit.qmsg
....\..\..\Vhdl1.hier_info
....\..\..\Vhdl1.hif
....\..\..\Vhdl1.map.cdb
....\..\..\Vhdl1.map.hdb
....\..\..\Vhdl1.map.logdb
....\..\..\Vhdl1.map.qmsg
....\..\..\Vhdl1.pre_map.cdb
....\..\..\Vhdl1.pre_map.hdb
....\..\..\Vhdl1.psp
....\..\..\Vhdl1.pss
....\..\..\Vhdl1.rtlv.hdb
....\..\..\Vhdl1.rtlv_sg.cdb
....\..\..\Vhdl1.rtlv_sg_swap.cdb
....\..\..\Vhdl1.sgdiff.cdb
....\..\..\Vhdl1.sgdiff.hdb
....\..\..\Vhdl1.sim.cvwf
....\..\..\Vhdl1.sim.hdb
....\..\..\Vhdl1.sim.qmsg
....\..\..\Vhdl1.sim.rdb
....\..\..\Vhdl1.sld_design_entry.sci
....\..\..\Vhdl1.sld_design_entry_dsc.sci
....\..\..\Vhdl1.syn_hier_info
....\..\..\Vhdl1.tan.qmsg
....\..\..\Vhdl1.tis_db_list.ddb
....\..\..\wed.wsf
....\..\Vhdl1.asm.rpt
....\..\Vhdl1.cdf
....\..\Vhdl1.done
....\..\Vhdl1.dpf
....\..\Vhdl1.fit.rpt
....\..\Vhdl1.fit.summary
....\..\Vhdl1.flow.rpt
....\..\Vhdl1.map.rpt
....\..\Vhdl1.map.summary
....\..\Vhdl1.pin
....\..\Vhdl1.pof
....\..\Vhdl1.qpf
....\..\Vhdl1.qsf
....\..\Vhdl1.qws
....\..\Vhdl1.sim.rpt
....\..\Vhdl1.tan.rpt
....\..\Vhdl1.tan.summary
....\..\Vhdl1.vhd
....\..\Vhdl1.vhd.bak
....\..\Vhdl1.vwf
....\jppCPLD
....\.......\CPLD1.bdf
....\.......\CPLD1.qpf
....\.......\CPLD1.qsf
....\.......\CPLD1.qws
....\.......\db
....\.......\..\CPLD1.db_info
....\.......\..\CPLD1.eco.cdb
....\.......\..\CPLD1.sld_design_entry.sci
....\.......\..\db
....\.......\..\..\prev_cmp_Vhdl1.asm.qmsg
....\.......\..\..\prev_cmp_Vhdl1.fit.qmsg
....\.......\..\..\prev_cmp_Vhdl1.map.qmsg
....\.......\..\..\prev_cmp_Vhdl1.qmsg
....\.......\..\..\prev_cmp_Vhdl1.sim.qmsg
....\.......\..\..\prev_cmp_Vhdl1.tan.qmsg
....\.......\..\..\Vhdl1.asm.qmsg
....\.......\..\..\Vhdl1.cbx.xml
....\.......\..\..\Vhdl1.cmp.cdb
....\.......\..\..\Vhdl1.cmp.hdb
....\.......\..\..\Vhdl1.cmp.logdb
....\.......\..\..\Vhdl1.cmp.rdb
....\.......\..\..\Vhdl1.cmp.tdb
....\.......\..\..\Vhdl1.cmp0.ddb
....\.......\..\..\Vhdl1.dbp
....\.......\..\..\Vhdl1.db_info
....\CPLD1.bdf
....\CPLD1.qpf
....\CPLD1.qsf
....\CPLD1.qws
....\db
....\..\CPLD1.db_info
....\..\CPLD1.eco.cdb
....\..\CPLD1.sld_design_entry.sci
....\..\db
....\..\..\prev_cmp_Vhdl1.asm.qmsg
....\..\..\prev_cmp_Vhdl1.fit.qmsg
....\..\..\prev_cmp_Vhdl1.map.qmsg
....\..\..\prev_cmp_Vhdl1.qmsg
....\..\..\prev_cmp_Vhdl1.sim.qmsg
....\..\..\prev_cmp_Vhdl1.tan.qmsg
....\..\..\Vhdl1.asm.qmsg
....\..\..\Vhdl1.cbx.xml
....\..\..\Vhdl1.cmp.cdb
....\..\..\Vhdl1.cmp.hdb
....\..\..\Vhdl1.cmp.logdb
....\..\..\Vhdl1.cmp.rdb
....\..\..\Vhdl1.cmp.tdb
....\..\..\Vhdl1.cmp0.ddb
....\..\..\Vhdl1.dbp
....\..\..\Vhdl1.db_info
....\..\..\Vhdl1.eco.cdb
....\..\..\Vhdl1.eds_overflow
....\..\..\Vhdl1.fit.qmsg
....\..\..\Vhdl1.hier_info
....\..\..\Vhdl1.hif
....\..\..\Vhdl1.map.cdb
....\..\..\Vhdl1.map.hdb
....\..\..\Vhdl1.map.logdb
....\..\..\Vhdl1.map.qmsg
....\..\..\Vhdl1.pre_map.cdb
....\..\..\Vhdl1.pre_map.hdb
....\..\..\Vhdl1.psp
....\..\..\Vhdl1.pss
....\..\..\Vhdl1.rtlv.hdb
....\..\..\Vhdl1.rtlv_sg.cdb
....\..\..\Vhdl1.rtlv_sg_swap.cdb
....\..\..\Vhdl1.sgdiff.cdb
....\..\..\Vhdl1.sgdiff.hdb
....\..\..\Vhdl1.sim.cvwf
....\..\..\Vhdl1.sim.hdb
....\..\..\Vhdl1.sim.qmsg
....\..\..\Vhdl1.sim.rdb
....\..\..\Vhdl1.sld_design_entry.sci
....\..\..\Vhdl1.sld_design_entry_dsc.sci
....\..\..\Vhdl1.syn_hier_info
....\..\..\Vhdl1.tan.qmsg
....\..\..\Vhdl1.tis_db_list.ddb
....\..\..\wed.wsf
....\..\Vhdl1.asm.rpt
....\..\Vhdl1.cdf
....\..\Vhdl1.done
....\..\Vhdl1.dpf
....\..\Vhdl1.fit.rpt
....\..\Vhdl1.fit.summary
....\..\Vhdl1.flow.rpt
....\..\Vhdl1.map.rpt
....\..\Vhdl1.map.summary
....\..\Vhdl1.pin
....\..\Vhdl1.pof
....\..\Vhdl1.qpf
....\..\Vhdl1.qsf
....\..\Vhdl1.qws
....\..\Vhdl1.sim.rpt
....\..\Vhdl1.tan.rpt
....\..\Vhdl1.tan.summary
....\..\Vhdl1.vhd
....\..\Vhdl1.vhd.bak
....\..\Vhdl1.vwf
....\jppCPLD
....\.......\CPLD1.bdf
....\.......\CPLD1.qpf
....\.......\CPLD1.qsf
....\.......\CPLD1.qws
....\.......\db
....\.......\..\CPLD1.db_info
....\.......\..\CPLD1.eco.cdb
....\.......\..\CPLD1.sld_design_entry.sci
....\.......\..\db
....\.......\..\..\prev_cmp_Vhdl1.asm.qmsg
....\.......\..\..\prev_cmp_Vhdl1.fit.qmsg
....\.......\..\..\prev_cmp_Vhdl1.map.qmsg
....\.......\..\..\prev_cmp_Vhdl1.qmsg
....\.......\..\..\prev_cmp_Vhdl1.sim.qmsg
....\.......\..\..\prev_cmp_Vhdl1.tan.qmsg
....\.......\..\..\Vhdl1.asm.qmsg
....\.......\..\..\Vhdl1.cbx.xml
....\.......\..\..\Vhdl1.cmp.cdb
....\.......\..\..\Vhdl1.cmp.hdb
....\.......\..\..\Vhdl1.cmp.logdb
....\.......\..\..\Vhdl1.cmp.rdb
....\.......\..\..\Vhdl1.cmp.tdb
....\.......\..\..\Vhdl1.cmp0.ddb
....\.......\..\..\Vhdl1.dbp
....\.......\..\..\Vhdl1.db_info