文件名称:wireless-communication-program

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 145kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • je***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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无线通信FPGA设计[田耘等编着][程序源代码]-wireless communication Verilog program scource
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Verilog代码

...........\c10

...........\...\10-2

...........\...\....\mult.xco

...........\...\....\mydds.xco

...........\...\....\square_syn.v

...........\...\10-4

...........\...\....\coastas_dds.v

...........\...\....\costas_lf.v

...........\...\....\costas_loop.v

...........\...\....\costas_lpf.v

...........\...\....\costas_mult.v

...........\...\....\err_mult.v

...........\...\....\fir_lpf.xco

...........\...\....\mult.xco

...........\...\....\my_dds.xco

...........\...\10-6

...........\...\....\de_mult.xco

...........\...\....\dearly_sub.v

...........\...\....\dedds.v

...........\...\....\delay_early_gate.v

...........\...\....\eddds.xco

...........\...\....\iir.v

...........\...\....\iir1.v

...........\...\10-8

...........\...\....\baker.v

...........\c11

...........\...\11-10

...........\...\.....\div16.xco

...........\...\.....\fir_rls.v

...........\...\.....\rlsmult.xco

...........\...\.....\shiftreg25.xco

...........\...\.....\shiftreg28.xco

...........\...\.....\shiftreg3.xco

...........\...\11-12

...........\...\.....\dfe_filter.v

...........\...\.....\dfe_mult.xco

...........\...\11-14

...........\...\.....\aa_adder.xco

...........\...\.....\aa_bram.xco

...........\...\.....\aa_cmult.xco

...........\...\.....\ad_a.v

...........\...\.....\shift16.xco

...........\...\11-2

...........\...\....\fir_lms.v

...........\...\11-3

...........\...\....\fir_pipline_lms.v

...........\...\....\lmsmult.xco

...........\...\11-5

...........\...\....\mult.xco

...........\...\....\shiftreg4.xco

...........\...\....\sign_fir_lms.v

...........\...\11-8

...........\...\....\blockconnect.v

...........\...\....\cmult.v

...........\...\....\coe_updata.v

...........\...\....\complex_mult.xco

...........\...\....\fft_block.v

...........\...\....\fft_block_lms.v

...........\...\....\fft_w16_p32.xco

...........\...\....\gonge.v

...........\...\....\ifft_block.v

...........\...\....\insert.v

...........\...\....\save_sub.v

...........\...\....\shift_reg2.xco

...........\...\....\shiftreg.xco

...........\...\....\shiftreg3.xco

...........\...\....\srl16_w16_d16.xco

...........\...\....\test_block_connect.v

...........\c12_0

...........\.....\12-2_0

...........\.....\12-4_0

...........\.....\12-6

...........\.....\....\rake_cmult.xco

...........\.....\....\rake_mrc.v

...........\.....\....\rake_shift4.xco

...........\c13

...........\...\13-2

...........\...\....\ovsf.v

...........\...\13-3

...........\...\....\Dscamb.v

...........\...\13-6

...........\...\....\CPICH.v

...........\...\....\adder_18vs18.xco

...........\...\....\ram_1024.xco

...........\...\....\ram_descramb.xco

...........\c3

...........\..\3-22

...........\..\....\adder8.v

...........\..\3-23

...........\..\....\adder8_2.v

...........\..\3-24

...........\..\....\adder8_4.v

...........\c5

...........\..\5-1

...........\..\...\adder16_2.v

...........\..\5-10

...........\..\....\div16.xco

...........\..\....\div16_1.v

...........\..\5-11

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