文件名称:Based-VHDL-Fpga-Development
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基于Altera FPGA/CPLD的电子系统设计及工程实践书籍源代码-Book source code of Altera FPGA/CPLD-based electronic system design and engineering practice
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基于VHDL的FPGA开发快速入门.技巧.实例——源程序\第5章\例5-1\seg7_dis.vhd
..............................................\.....\.....0\mealy.vhd
..............................................\.....\....2\add_dis.vhd
..............................................\.....\....3\div_4.vhd
..............................................\.....\....4\div_4.vhd
..............................................\.....\....5\div_even.vhd
..............................................\.....\....6\div_3.vhd
..............................................\.....\....7\div_odd.vhd
..............................................\.....\....8\key_input.vhd
..............................................\.....\....9\control.vhd
..............................................\..9章\fifo\fifo64.vhd
..............................................\.....\....\fifo_64_s.vhd
..............................................\.....\....\graycounter.vhd
..............................................\.....\hdlc\fifo_64.vhd
..............................................\.....\....\hdlc_rx.vhd
..............................................\.....\....\hdlc_tx.vhd
..............................................\.....\....\top.vhd
..............................................\.....\i2c\i2c.vhd
..............................................\.....\...\i2c_core.vhd
..............................................\.....\ps2\ps2.vhd
..............................................\.....\uart\divclk.vhd
..............................................\.....\....\uart.vhd
..............................................\.....\....\uart_rx.vhd
..............................................\.....\....\uart_tx.vhd
..............................................\.....\voice\cmx649.vhd
..............................................\.....\.....\cmx649_cmd.vhd
..............................................\.....\.....\divclk.vhd
..............................................\.....\.....\s_rx.vhd
..............................................\.....\.....\s_tx.vhd
..............................................\.....\.....\voice_top.vhd
..............................................\..5章\例5-1
..............................................\.....\例5-10
..............................................\.....\例5-2
..............................................\.....\例5-3
..............................................\.....\例5-4
..............................................\.....\例5-5
..............................................\.....\例5-6
..............................................\.....\例5-7
..............................................\.....\例5-8
..............................................\.....\例5-9
..............................................\..9章\fifo
..............................................\.....\hdlc
..............................................\.....\i2c
..............................................\.....\ps2
..............................................\.....\uart
..............................................\.....\voice
..............................................\第5章
..............................................\第9章
基于VHDL的FPGA开发快速入门.技巧.实例——源程序
..............................................\.....\.....0\mealy.vhd
..............................................\.....\....2\add_dis.vhd
..............................................\.....\....3\div_4.vhd
..............................................\.....\....4\div_4.vhd
..............................................\.....\....5\div_even.vhd
..............................................\.....\....6\div_3.vhd
..............................................\.....\....7\div_odd.vhd
..............................................\.....\....8\key_input.vhd
..............................................\.....\....9\control.vhd
..............................................\..9章\fifo\fifo64.vhd
..............................................\.....\....\fifo_64_s.vhd
..............................................\.....\....\graycounter.vhd
..............................................\.....\hdlc\fifo_64.vhd
..............................................\.....\....\hdlc_rx.vhd
..............................................\.....\....\hdlc_tx.vhd
..............................................\.....\....\top.vhd
..............................................\.....\i2c\i2c.vhd
..............................................\.....\...\i2c_core.vhd
..............................................\.....\ps2\ps2.vhd
..............................................\.....\uart\divclk.vhd
..............................................\.....\....\uart.vhd
..............................................\.....\....\uart_rx.vhd
..............................................\.....\....\uart_tx.vhd
..............................................\.....\voice\cmx649.vhd
..............................................\.....\.....\cmx649_cmd.vhd
..............................................\.....\.....\divclk.vhd
..............................................\.....\.....\s_rx.vhd
..............................................\.....\.....\s_tx.vhd
..............................................\.....\.....\voice_top.vhd
..............................................\..5章\例5-1
..............................................\.....\例5-10
..............................................\.....\例5-2
..............................................\.....\例5-3
..............................................\.....\例5-4
..............................................\.....\例5-5
..............................................\.....\例5-6
..............................................\.....\例5-7
..............................................\.....\例5-8
..............................................\.....\例5-9
..............................................\..9章\fifo
..............................................\.....\hdlc
..............................................\.....\i2c
..............................................\.....\ps2
..............................................\.....\uart
..............................................\.....\voice
..............................................\第5章
..............................................\第9章
基于VHDL的FPGA开发快速入门.技巧.实例——源程序