文件名称:FPGA_clock
介绍说明--下载内容均来自于网络,请自行研究使用
使用VHDL语言在FPGA上完成数字时钟设计,可作为设计的参考-In the digital clock on the FPGA design using VHDL can be used as a reference design
(系统自动生成,下载前可以参看下载内容)
下载文件列表
FPGA_clock\clock\clock.vhd
..........\decode47.vhd
..........\fen1.vhd
..........\fen100.vhd
..........\fen24.vhd
..........\fen60.vhd
..........\sel.vhd
..........\clock
FPGA_clock
..........\decode47.vhd
..........\fen1.vhd
..........\fen100.vhd
..........\fen24.vhd
..........\fen60.vhd
..........\sel.vhd
..........\clock
FPGA_clock