文件名称:Synopsys_90nm_lib_course-OpenSPARC
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开源可扩充处理器架构.源代码Synopsys_90nm_lib_course-OpenSPARC_labs_final_041509-Synopsys 90nm lib course-OpenSPARC labs final 041509
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下载文件列表
Synopsys_90nm_lib_course-OpenSPARC_labs_final_041509\dc_script\dc_startup.tcl
....................................................\.esign\common\cluster_header.v
....................................................\......\......\swrvr_clib.v
....................................................\......\......\swrvr_dlib.v
....................................................\......\......\synchronizer_asr.v
....................................................\......\......\test_stub_scan.v
....................................................\......\fpu\bw_clk_cl_fpu_cmp\synopsys\gate\bw_clk_cl_fpu_cmp_flat_nc.v
....................................................\......\...\.................\........\....\bw_clk_cl_fpu_cmp_hier.v
....................................................\......\...\.................\........\script\user_cfg.scr
....................................................\......\...\fpu_add\synopsys\gate\fpu_add_flat_nc.v
....................................................\......\...\.......\........\....\fpu_add_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\....div\synopsys\gate\fpu_div_flat_nc.v
....................................................\......\...\.......\........\....\fpu_div_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\.......\........\......\user_cfg.scr.orig
....................................................\......\...\....in\synopsys\gate\fpu_in_flat_nc.v
....................................................\......\...\......\........\....\fpu_in_hier.v
....................................................\......\...\......\........\script\user_cfg.scr
....................................................\......\...\....mul\synopsys\gate\fpu_mul_flat_nc.v
....................................................\......\...\.......\........\....\fpu_mul_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\....out\synopsys\gate\fpu_out_flat_nc.v
....................................................\......\...\.......\........\....\fpu_out_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\....rptr_groups\synopsys\gate\fpu_rptr_groups_flat_nc.v
....................................................\......\...\...............\........\....\fpu_rptr_groups_hier.v
....................................................\......\...\...............\........\script\user_cfg.scr
....................................................\......\...\rtl\bw_clk_cl_fpu_cmp.v
....................................................\......\...\...\fpu.v
....................................................\......\...\...\fpu_add.v
....................................................\......\...\...\fpu_add_ctl.v
....................................................\......\...\...\fpu_add_exp_dp.v
....................................................\......\...\...\fpu_add_frac_dp.v
....................................................\......\...\...\fpu_cnt_lead0_53b.v
....................................................\......\...\...\fpu_cnt_lead0_64b.v
....................................................\......\...\...\fpu_cnt_lead0_lvl1.v
....................................................\......\...\...\fpu_cnt_lead0_lvl2.v
....................................................\......\...\...\fpu_cnt_lead0_lvl3.v
....................................................\......\...\...\fpu_cnt_lead0_lvl4.v
....................................................\......\...\...\fpu_denorm_3b.v
....................................................\......\...\...\fpu_denorm_3to1.v
....................................................\......\...\...\fpu_deno
....................................................\.esign\common\cluster_header.v
....................................................\......\......\swrvr_clib.v
....................................................\......\......\swrvr_dlib.v
....................................................\......\......\synchronizer_asr.v
....................................................\......\......\test_stub_scan.v
....................................................\......\fpu\bw_clk_cl_fpu_cmp\synopsys\gate\bw_clk_cl_fpu_cmp_flat_nc.v
....................................................\......\...\.................\........\....\bw_clk_cl_fpu_cmp_hier.v
....................................................\......\...\.................\........\script\user_cfg.scr
....................................................\......\...\fpu_add\synopsys\gate\fpu_add_flat_nc.v
....................................................\......\...\.......\........\....\fpu_add_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\....div\synopsys\gate\fpu_div_flat_nc.v
....................................................\......\...\.......\........\....\fpu_div_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\.......\........\......\user_cfg.scr.orig
....................................................\......\...\....in\synopsys\gate\fpu_in_flat_nc.v
....................................................\......\...\......\........\....\fpu_in_hier.v
....................................................\......\...\......\........\script\user_cfg.scr
....................................................\......\...\....mul\synopsys\gate\fpu_mul_flat_nc.v
....................................................\......\...\.......\........\....\fpu_mul_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\....out\synopsys\gate\fpu_out_flat_nc.v
....................................................\......\...\.......\........\....\fpu_out_hier.v
....................................................\......\...\.......\........\script\user_cfg.scr
....................................................\......\...\....rptr_groups\synopsys\gate\fpu_rptr_groups_flat_nc.v
....................................................\......\...\...............\........\....\fpu_rptr_groups_hier.v
....................................................\......\...\...............\........\script\user_cfg.scr
....................................................\......\...\rtl\bw_clk_cl_fpu_cmp.v
....................................................\......\...\...\fpu.v
....................................................\......\...\...\fpu_add.v
....................................................\......\...\...\fpu_add_ctl.v
....................................................\......\...\...\fpu_add_exp_dp.v
....................................................\......\...\...\fpu_add_frac_dp.v
....................................................\......\...\...\fpu_cnt_lead0_53b.v
....................................................\......\...\...\fpu_cnt_lead0_64b.v
....................................................\......\...\...\fpu_cnt_lead0_lvl1.v
....................................................\......\...\...\fpu_cnt_lead0_lvl2.v
....................................................\......\...\...\fpu_cnt_lead0_lvl3.v
....................................................\......\...\...\fpu_cnt_lead0_lvl4.v
....................................................\......\...\...\fpu_denorm_3b.v
....................................................\......\...\...\fpu_denorm_3to1.v
....................................................\......\...\...\fpu_deno