文件名称:A-Simplified-VHDL-UART
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In embedded systems, the processor that we choose for our design may not come with built-in peripherals. Therefore, designers will have to implement these devices in hardware keeping in mind that they will need to interface to the processor. In this lab we will design a simplified UART (Universal Asynchronous Reciever Transmitter) in VHDL and download it to the FPGA on the XS40 baord.
Serial communication is often used either to control or to receive data from an embedded microprocessor. Serial communication is a form of I/O in which the bits of a byte begin transferred appear one after the other in a timed sequence on a single wire. Serial communication has become the standard for intercomputer communication. In this lab, we ll try to build a serial link between 8051 and PC using RS232.
Serial communication is often used either to control or to receive data from an embedded microprocessor. Serial communication is a form of I/O in which the bits of a byte begin transferred appear one after the other in a timed sequence on a single wire. Serial communication has become the standard for intercomputer communication. In this lab, we ll try to build a serial link between 8051 and PC using RS232.
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下载文件列表
A Simplified VHDL UART\A Simplified VHDL UART.doc
......................\ctrup.vhd
......................\lab8.ucf
......................\LT1130.pdf
......................\main.c
......................\serial.exe
......................\uart.vhd
......................\uartclkdiv.vhd
......................\xs40.vhd
A Simplified VHDL UART
......................\ctrup.vhd
......................\lab8.ucf
......................\LT1130.pdf
......................\main.c
......................\serial.exe
......................\uart.vhd
......................\uartclkdiv.vhd
......................\xs40.vhd
A Simplified VHDL UART