文件名称:uart-
介绍说明－－下载内容均来自于网络，请自行研究使用
通用异步通讯UART的工程文档，ISE打开工程，里面有VERILOG的源代码，可以编译通过-UART Universal Asynchronous communication engineering documents, ISE open the project, which has VERILOG source code can be compiled
(系统自动生成,下载前可以参看下载内容)
下载文件列表
UART
....\automake.log
....\baudrate_generator.jhd
....\baudrate_generator.vhd
....\baudrate_generator_TB.jhd
....\baudrate_generator_TB.vhd
....\counter.jhd
....\counter.vhd
....\counter_TB.jhd
....\counter_TB.vhd
....\detector.jhd
....\detector.vhd
....\detector_TB.jhd
....\detector_TB.vhd
....\parity_verifier.jhd
....\parity_verifier.vhd
....\parity_verifier_TB.jhd
....\parity_verifier_TB.vhd
....\shift_register.jhd
....\shift_register.vhd
....\shift_register_TB.jhd
....\shift_register_TB.vhd
....\switch.jhd
....\switch.vhd
....\switch_bus.jhd
....\switch_bus.vhd
....\switch_bus_TB.jhd
....\switch_bus_TB.vhd
....\transcript
....\UART.ise
....\UART.npl
....\uart_core.jhd
....\uart_core.vhd
....\UART_PACKAGE.vhd
....\uart_top.jhd
....\uart_top.vhd
....\uart_top_tb.jhd
....\uart_top_tb.vhd
....\UART_xdb
....\........\tmp
....\........\...\ise
....\........\...\ise.lock
....\........\...\...\version
....\........\...\...\__OBJSTORE__
....\........\...\...\............\Autonym
....\........\...\...\............\common
....\........\...\...\............\_ProjRepoInternal_
....\........\...\...\__REGISTRY__
....\........\...\...\............\Autonym
....\........\...\...\............\.......\regkeys
....\........\...\...\............\common
....\........\...\...\............\......\regkeys
....\........\...\...\............\_ProjRepoInternal_
....\........\...\...\............\..................\regkeys
....\........\...\npl
....\__projnav
....\__projnav.log
....\.........\p00p5000.kis
....\.........\p00pi000.kis
....\.........\p00pl000.kis
....\.........\runXst_tcl.rsp
使用说明.txt
....\automake.log
....\baudrate_generator.jhd
....\baudrate_generator.vhd
....\baudrate_generator_TB.jhd
....\baudrate_generator_TB.vhd
....\counter.jhd
....\counter.vhd
....\counter_TB.jhd
....\counter_TB.vhd
....\detector.jhd
....\detector.vhd
....\detector_TB.jhd
....\detector_TB.vhd
....\parity_verifier.jhd
....\parity_verifier.vhd
....\parity_verifier_TB.jhd
....\parity_verifier_TB.vhd
....\shift_register.jhd
....\shift_register.vhd
....\shift_register_TB.jhd
....\shift_register_TB.vhd
....\switch.jhd
....\switch.vhd
....\switch_bus.jhd
....\switch_bus.vhd
....\switch_bus_TB.jhd
....\switch_bus_TB.vhd
....\transcript
....\UART.ise
....\UART.npl
....\uart_core.jhd
....\uart_core.vhd
....\UART_PACKAGE.vhd
....\uart_top.jhd
....\uart_top.vhd
....\uart_top_tb.jhd
....\uart_top_tb.vhd
....\UART_xdb
....\........\tmp
....\........\...\ise
....\........\...\ise.lock
....\........\...\...\version
....\........\...\...\__OBJSTORE__
....\........\...\...\............\Autonym
....\........\...\...\............\common
....\........\...\...\............\_ProjRepoInternal_
....\........\...\...\__REGISTRY__
....\........\...\...\............\Autonym
....\........\...\...\............\.......\regkeys
....\........\...\...\............\common
....\........\...\...\............\......\regkeys
....\........\...\...\............\_ProjRepoInternal_
....\........\...\...\............\..................\regkeys
....\........\...\npl
....\__projnav
....\__projnav.log
....\.........\p00p5000.kis
....\.........\p00pi000.kis
....\.........\p00pl000.kis
....\.........\runXst_tcl.rsp
使用说明.txt