文件名称:sanjiao
介绍说明－－下载内容均来自于网络，请自行研究使用
用FPGA产生正弦波信号，没有用到D/A转换器，采用的是pwm原理，占空比可调技术。-Using FPGA to generate sine wave signals, did not use the D/A converter, using the pwm principle, variable duty cycle technology.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
sanjiao\tmp\_cg\rom.mif
.......\xlnx_auto_0_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.......\...............\...\...\............\..................\.........\HDProject_StrTbl
.......\...............\...\...\..REGISTRY__\Autonym\regkeys
.......\...............\...\...\............\STE\xst\regkeys
.......\...............\...\...\............\...\regkeys
.......\...............\...\...\............\...\ngcbuild\regkeys
.......\...............\...\...\............\_ProjRepoInternal_\regkeys
.......\...............\...\...\............\common\regkeys
.......\...............\...\...\............\HierarchicalDesign\HDProject\regkeys
.......\...............\...\...\............\..................\regkeys
.......\...............\...\...\version
.......\...............\...\ise.lock
.......\blk_mem_gen_ds512.pdf
.......\xlnx_auto_0.ise
.......\rom.asy
.......\rom.mif
.......\rom.ngc
.......\rom.sym
.......\rom.v
.......\rom.veo
.......\rom.vhd
.......\rom.vho
.......\rom.xco
.......\rom_blk_mem_gen_v2_7_xst_1.ngc_xst.xrpt
.......\rom_flist.txt
.......\rom_readme.txt
.......\rom_xmdf.tcl
.......\ab.vhd
.......\xlnx_auto_0_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject
.......\...............\...\...\..REGISTRY__\STE\xst
.......\...............\...\...\............\...\ngcbuild
.......\...............\...\...\............\HierarchicalDesign\HDProject
.......\...............\...\...\..OBJSTORE__\Autonym
.......\...............\...\...\............\STE
.......\...............\...\...\............\_ProjRepoInternal_
.......\...............\...\...\............\common
.......\...............\...\...\............\HierarchicalDesign
.......\...............\...\...\..REGISTRY__\Autonym
.......\...............\...\...\............\STE
.......\...............\...\...\............\_ProjRepoInternal_
.......\...............\...\...\............\common
.......\...............\...\...\............\ngcbuild
.......\...............\...\...\............\HierarchicalDesign
.......\...............\...\...\__OBJSTORE__
.......\...............\...\...\__REGISTRY__
.......\...............\...\ise
.......\tmp\_cg
.......\xlnx_auto_0_xdb\tmp
.......\tmp
.......\xlnx_auto_0_xdb
sanjiao
.......\xlnx_auto_0_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.......\...............\...\...\............\..................\.........\HDProject_StrTbl
.......\...............\...\...\..REGISTRY__\Autonym\regkeys
.......\...............\...\...\............\STE\xst\regkeys
.......\...............\...\...\............\...\regkeys
.......\...............\...\...\............\...\ngcbuild\regkeys
.......\...............\...\...\............\_ProjRepoInternal_\regkeys
.......\...............\...\...\............\common\regkeys
.......\...............\...\...\............\HierarchicalDesign\HDProject\regkeys
.......\...............\...\...\............\..................\regkeys
.......\...............\...\...\version
.......\...............\...\ise.lock
.......\blk_mem_gen_ds512.pdf
.......\xlnx_auto_0.ise
.......\rom.asy
.......\rom.mif
.......\rom.ngc
.......\rom.sym
.......\rom.v
.......\rom.veo
.......\rom.vhd
.......\rom.vho
.......\rom.xco
.......\rom_blk_mem_gen_v2_7_xst_1.ngc_xst.xrpt
.......\rom_flist.txt
.......\rom_readme.txt
.......\rom_xmdf.tcl
.......\ab.vhd
.......\xlnx_auto_0_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject
.......\...............\...\...\..REGISTRY__\STE\xst
.......\...............\...\...\............\...\ngcbuild
.......\...............\...\...\............\HierarchicalDesign\HDProject
.......\...............\...\...\..OBJSTORE__\Autonym
.......\...............\...\...\............\STE
.......\...............\...\...\............\_ProjRepoInternal_
.......\...............\...\...\............\common
.......\...............\...\...\............\HierarchicalDesign
.......\...............\...\...\..REGISTRY__\Autonym
.......\...............\...\...\............\STE
.......\...............\...\...\............\_ProjRepoInternal_
.......\...............\...\...\............\common
.......\...............\...\...\............\ngcbuild
.......\...............\...\...\............\HierarchicalDesign
.......\...............\...\...\__OBJSTORE__
.......\...............\...\...\__REGISTRY__
.......\...............\...\ise
.......\tmp\_cg
.......\xlnx_auto_0_xdb\tmp
.......\tmp
.......\xlnx_auto_0_xdb
sanjiao