本文详细介绍了基于DCC和JTAG的删硬件仿真调试器的研究与设计 过程。该硬件仿真调试器除了具有下载、断点、单步运行、连续运行、读写内存区域和对寄存器操作等基本调试功能外，还有通过使能DCC通道，来进行快速对目标机内存读写的功能。因为读写内存是调试过程中最常用的功能，这样就大大地提高了调试的效率。文中，首先对嵌入式系统开发和嵌入式调试器进行了全面的介绍。然后对当前嵌入式调试中应用最为广泛的JTAG技术和删中的 JTAG原理作了详细介绍。接着对删片上调试原理进行了深入分析。最后， 深入阐述了L锄bdaICE的设计、实现和测试过程。-This paper describes the deletion based on DCC and JTAG debugger hardware simulation research and design process. The addition of hardware emulation download debugger, breakpoints, single step, continuous operation, read and write memory region and the basic debugging features such as register operations, there by enabling DCC channel for fast read and write memory on the target machine function. Because the process of read-write memory is the most common debugging functions, thus greatly improving the efficiency of debugging. In this paper, the first embedded system development and embedded debugger, a comprehensive introduction. Then embedded debugging in the current most widely used in JTAG JTAG technology and delete the principle introduced in detail. Then delete the on-chip debugging of the principle in-depth analysis. Finally, dig into the details of the L bdaICE the design, implementation and testing process.