文件名称:ALU
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verilog硬件仿真,实现32-bit RISC微处理器的算数逻辑单仿真元(ALU),实现加减运算、逻辑运算、移位运算。仿真级别为RTL级。-verilog hardware simulation, to achieve 32-bit RISC microprocessor arithmetic logic one simulation element (ALU), to achieve addition and subtraction operations, logic operations, shift operations. RTL-level simulation level.
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下载文件列表
adder.v
ALU.v
logic32.v
shifter.v
ALU.v
logic32.v
shifter.v