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文件名称:adder

  • 所属分类：
  • VHDL编程
  • 资源属性：
  • [VHDL] [源码]
  • 上传时间：
  • 2012-11-26
  • 文件大小：
  • 295kb
  • 下载次数：
  • 0次
  • 提 供 者：
  • 张*
  • 相关连接：
  • 无
  • 下载说明：
  • 别用迅雷下载，失败请重下，重下不扣分！
修正介绍说明

介绍说明－－下载内容均来自于网络，请自行研究使用

加法器是产生数的和的装置。加数和被加数为输入，和数与进位为输出的装置为半加器。若加数、被加数与低位的进位数为输入，而和数与进位为输出则为全加器。-The number of adder is produced and device. Addend and BeiJiaShu as input, and the device for output with binary for half a gal device. If BeiJiaShu and low addends, into digits for input, and and and carry for the output is for QuanJia device.


(系统自动生成,下载前可以参看下载内容)

下载文件列表

adder\adder\_info

.....\adder16.asm.rpt

.....\adder16.done

.....\adder16.fit.rpt

.....\adder16.fit.smsg

.....\adder16.fit.summary

.....\adder16.flow.rpt

.....\adder16.map.rpt

.....\adder16.map.summary

.....\adder16.pin

.....\adder16.pof

.....\adder16.qpf

.....\adder16.qsf

.....\adder16.qws

.....\adder16.sof

.....\adder16.tan.rpt

.....\adder16.tan.summary

.....\adder16.v

.....\adder16.v.bak

.....\db\adder16.asm.qmsg

.....\..\adder16.asm_labs.ddb

.....\..\adder16.cbx.xml

.....\..\adder16.cmp.bpm

.....\..\adder16.cmp.cdb

.....\..\adder16.cmp.ecobp

.....\..\adder16.cmp.hdb

.....\..\adder16.cmp.logdb

.....\..\adder16.cmp.rdb

.....\..\adder16.cmp.tdb

.....\..\adder16.cmp0.ddb

.....\..\adder16.db_info

.....\..\adder16.eco.cdb

.....\..\adder16.fit.qmsg

.....\..\adder16.hier_info

.....\..\adder16.hif

.....\..\adder16.map.bpm

.....\..\adder16.map.cdb

.....\..\adder16.map.ecobp

.....\..\adder16.map.hdb

.....\..\adder16.map.logdb

.....\..\adder16.map.qmsg

.....\..\adder16.map_bb.cdb

.....\..\adder16.map_bb.hdb

.....\..\adder16.map_bb.hdbx

.....\..\adder16.map_bb.logdb

.....\..\adder16.pre_map.cdb

.....\..\adder16.pre_map.hdb

.....\..\adder16.psp

.....\..\adder16.root_partition.cmp.atm

.....\..\adder16.root_partition.cmp.dfp

.....\..\adder16.root_partition.cmp.hdbx

.....\..\adder16.root_partition.cmp.logdb

.....\..\adder16.root_partition.cmp.rcf

.....\..\adder16.root_partition.map.atm

.....\..\adder16.root_partition.map.hdbx

.....\..\adder16.root_partition.map.info

.....\..\adder16.rpp.qmsg

.....\..\adder16.rtlv.hdb

.....\..\adder16.rtlv_sg.cdb

.....\..\adder16.rtlv_sg_swap.cdb

.....\..\adder16.sgate.rvd

.....\..\adder16.sgate_sm.rvd

.....\..\adder16.sgdiff.cdb

.....\..\adder16.sgdiff.hdb

.....\..\adder16.signalprobe.cdb

.....\..\adder16.sld_design_entry.sci

.....\..\adder16.sld_design_entry_dsc.sci

.....\..\adder16.syn_hier_info

.....\..\adder16.tan.qmsg

.....\..\adder16.tis_db_list.ddb

.....\..\adder16.tmw_info

.....\..\prev_cmp_adder16.asm.qmsg

.....\..\prev_cmp_adder16.fit.qmsg

.....\..\prev_cmp_adder16.map.qmsg

.....\..\prev_cmp_adder16.qmsg

.....\..\prev_cmp_adder16.tan.qmsg

.....\modelsim.ini

.....\adder

.....\db

adder

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