文件名称:SSDClock
介绍说明--下载内容均来自于网络,请自行研究使用
Verilog code, counts (time base 60) used on fpga
(系统自动生成,下载前可以参看下载内容)
下载文件列表
SSDClock\_ngo
........\....\netlist.lst
........\_xmsgs
........\......\bitgen.xmsgs
........\......\map.xmsgs
........\......\ngdbuild.xmsgs
........\......\par.xmsgs
........\......\pn_parser.xmsgs
........\......\trce.xmsgs
........\......\xst.xmsgs
........\Basys.ucf
........\ipcore_dir
........\..........\clk.v
........\..........\clk.xaw
........\..........\clk_arwz.ucf
........\..........\clk_flist.txt
........\..........\clk_readme.txt
........\..........\clk_xmdf.tcl
........\..........\coregen.cgc
........\..........\coregen.cgp
........\..........\tmp
........\..........\...\_cg
........\..........\xaw2verilog.log
........\iseconfig
........\.........\SSDClkMain.xreport
........\.........\SSDClock.projectmgr
........\Nexys2_500General.ucf
........\ssdclkmain.bgn
........\ssdclkmain.bit
........\SSDClkMain.bld
........\SSDClkMain.cmd_log
........\ssdclkmain.drc
........\SSDClkMain.lso
........\SSDClkMain.ncd
........\SSDClkMain.ngc
........\SSDClkMain.ngd
........\SSDClkMain.ngr
........\SSDClkMain.pad
........\SSDClkMain.par
........\SSDClkMain.pcf
........\SSDClkMain.prj
........\SSDClkMain.ptwx
........\SSDClkMain.stx
........\SSDClkMain.syr
........\SSDClkMain.twr
........\SSDClkMain.twx
........\SSDClkMain.unroutes
........\SSDClkMain.ut
........\SSDClkMain.v
........\SSDClkMain.xpi
........\SSDClkMain.xst
........\SSDClkMain_bitgen.xwbt
........\SSDClkMain_envsettings.html
........\SSDClkMain_guide.ncd
........\SSDClkMain_map.map
........\SSDClkMain_map.mrp
........\SSDClkMain_map.ncd
........\SSDClkMain_map.ngm
........\SSDClkMain_map.xrpt
........\SSDClkMain_ngdbuild.xrpt
........\SSDClkMain_pad.csv
........\SSDClkMain_pad.txt
........\SSDClkMain_par.xrpt
........\SSDClkMain_preroute.twr
........\SSDClkMain_preroute.twx
........\SSDClkMain_summary.html
........\SSDClkMain_summary.xml
........\SSDClkMain_usage.xml
........\SSDClkMain_xst.xrpt
........\SSDClock.gise
........\SSDClock.xise
........\test.bgn
........\test.bld
........\test.drc
........\test.ncd
........\test.ngd
........\test.pad
........\test.par
........\test.pcf
........\test.ptwx
........\test.twr
........\test.twx
........\test.unroutes
........\test.ut
........\test.xpi
........\test_bitgen.xwbt
........\test_envsettings.html
........\test_guide.ncd
........\test_map.map
........\test_map.mrp
........\test_map.ncd
........\test_map.ngm
........\test_map.xrpt
........\test_ngdbuild.xrpt
........\test_pad.csv
........\test_pad.txt
........\test_par.xrpt
........\test_summary.html
........\test_summary.xml
........\test_usage.xml
........\....\netlist.lst
........\_xmsgs
........\......\bitgen.xmsgs
........\......\map.xmsgs
........\......\ngdbuild.xmsgs
........\......\par.xmsgs
........\......\pn_parser.xmsgs
........\......\trce.xmsgs
........\......\xst.xmsgs
........\Basys.ucf
........\ipcore_dir
........\..........\clk.v
........\..........\clk.xaw
........\..........\clk_arwz.ucf
........\..........\clk_flist.txt
........\..........\clk_readme.txt
........\..........\clk_xmdf.tcl
........\..........\coregen.cgc
........\..........\coregen.cgp
........\..........\tmp
........\..........\...\_cg
........\..........\xaw2verilog.log
........\iseconfig
........\.........\SSDClkMain.xreport
........\.........\SSDClock.projectmgr
........\Nexys2_500General.ucf
........\ssdclkmain.bgn
........\ssdclkmain.bit
........\SSDClkMain.bld
........\SSDClkMain.cmd_log
........\ssdclkmain.drc
........\SSDClkMain.lso
........\SSDClkMain.ncd
........\SSDClkMain.ngc
........\SSDClkMain.ngd
........\SSDClkMain.ngr
........\SSDClkMain.pad
........\SSDClkMain.par
........\SSDClkMain.pcf
........\SSDClkMain.prj
........\SSDClkMain.ptwx
........\SSDClkMain.stx
........\SSDClkMain.syr
........\SSDClkMain.twr
........\SSDClkMain.twx
........\SSDClkMain.unroutes
........\SSDClkMain.ut
........\SSDClkMain.v
........\SSDClkMain.xpi
........\SSDClkMain.xst
........\SSDClkMain_bitgen.xwbt
........\SSDClkMain_envsettings.html
........\SSDClkMain_guide.ncd
........\SSDClkMain_map.map
........\SSDClkMain_map.mrp
........\SSDClkMain_map.ncd
........\SSDClkMain_map.ngm
........\SSDClkMain_map.xrpt
........\SSDClkMain_ngdbuild.xrpt
........\SSDClkMain_pad.csv
........\SSDClkMain_pad.txt
........\SSDClkMain_par.xrpt
........\SSDClkMain_preroute.twr
........\SSDClkMain_preroute.twx
........\SSDClkMain_summary.html
........\SSDClkMain_summary.xml
........\SSDClkMain_usage.xml
........\SSDClkMain_xst.xrpt
........\SSDClock.gise
........\SSDClock.xise
........\test.bgn
........\test.bld
........\test.drc
........\test.ncd
........\test.ngd
........\test.pad
........\test.par
........\test.pcf
........\test.ptwx
........\test.twr
........\test.twx
........\test.unroutes
........\test.ut
........\test.xpi
........\test_bitgen.xwbt
........\test_envsettings.html
........\test_guide.ncd
........\test_map.map
........\test_map.mrp
........\test_map.ncd
........\test_map.ngm
........\test_map.xrpt
........\test_ngdbuild.xrpt
........\test_pad.csv
........\test_pad.txt
........\test_par.xrpt
........\test_summary.html
........\test_summary.xml
........\test_usage.xml