文件名称:Snake

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.38mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • i***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

Verilog, Snake game, VGA, Keyboard
(系统自动生成,下载前可以参看下载内容)

下载文件列表

Snake\.lso

.....\ALU.v

.....\ALU_Control.v

.....\Banco_reg.v

.....\Branch.v

.....\DecoTecla.v

.....\Divisor.v

.....\Divisor2.prj

.....\Divisor2.stx

.....\Divisor2.v

.....\Divisor2.xst

.....\Micro.v

.....\Micro_control.v

.....\Mux2x1.v

.....\Mux2x1_5bits.v

.....\Mux3x1.v

.....\Mux4x1.v

.....\Pinta.prj

.....\Pinta.stx

.....\Pinta.v

.....\Pinta.xst

.....\pixeles.v

.....\principal.bgn

.....\principal.bit

.....\Principal.bld

.....\Principal.cmd_log

.....\principal.drc

.....\Principal.lso

.....\Principal.ncd

.....\Principal.ngc

.....\Principal.ngd

.....\Principal.ngr

.....\Principal.pad

.....\Principal.par

.....\Principal.pcf

.....\Principal.prj

.....\Principal.ptwx

.....\Principal.stx

.....\Principal.syr

.....\Principal.twr

.....\Principal.twx

.....\Principal.ucf

.....\Principal.unroutes

.....\Principal.ut

.....\Principal.v

.....\Principal.xpi

.....\Principal.xst

.....\Principal_guide.ncd

.....\Principal_map.map

.....\Principal_map.mrp

.....\Principal_map.ncd

.....\Principal_map.ngm

.....\Principal_map.xrpt

.....\Principal_ngdbuild.xrpt

.....\Principal_pad.csv

.....\Principal_pad.txt

.....\Principal_par.xrpt

.....\Principal_prev_built.ngd

.....\Principal_summary.html

.....\Principal_summary.xml

.....\Principal_usage.xml

.....\Principal_xst.xrpt

.....\prueba.vhd

.....\prueba_summary.html

.....\RAM.prj

.....\RAM.stx

.....\RAM.v

.....\RAM.xst

.....\Reg32bits.v

.....\RegPC.v

.....\ROM.prj

.....\ROM.stx

.....\ROM.v

.....\ROM.xst

.....\SignExtend.v

.....\smartpreview.twr

.....\Snake4.0.gise

.....\Snake4.0.ise

.....\Snake4.0.ntrc_log

.....\Snake4.0.xise

.....\........_xdb\cst.xbcd

.....\............\tmp\ise\version

.....\............\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject

.....\............\...\...\............\..................\.........\HDProject_StrTbl

.....\............\...\...\............\..................\__stored_object_table__

.....\............\...\...\............\PnAutoRun\Scripts\RunOnce_tcl

.....\............\...\...\............\.........\.......\RunOnce_tcl_StrTbl

.....\............\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main

.....\............\...\...\............\................\................\dpm_project_main_StrTbl

.....\............\...\...\............\................Gui\CViewSelector

.....\............\...\...\............\...................\CViewSelector_StrTbl

.....\............\...\...\............\...................\File-SynthesisOnly

.....\............\...\...\............\...................\File-SynthesisOnly_StrTbl

.....\............\...\...\............\...................\Library-SynthesisOnly

.....\............\...\...\............\...................\Library-SynthesisOnly_StrTbl

.....\............\...\...\............\...................\Process-SynthesisOnly-

.....\............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG

.....\............\...\...\............\...................\Process-SynthesisOnly-DESUT_VERILOG_StrTbl

.....\............\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE

.....\............\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE_StrTbl

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