文件名称:DE2_TV
介绍说明－－下载内容均来自于网络，请自行研究使用
基于DE-2板的TV--box开发，verilog程序的开发-Based on DE-2 board TV- box development, verilog program development
(系统自动生成,下载前可以参看下载内容)
下载文件列表
DE2_TV\AUDIO_DAC.v
......\db\DE2_TV.db_info
......\..\DE2_TV.eco.cdb
......\..\DE2_TV.sld_design_entry.sci
......\DE2_TV.asm.rpt
......\DE2_TV.done
......\DE2_TV.dpf
......\DE2_TV.fit.rpt
......\DE2_TV.fit.smsg
......\DE2_TV.fit.summary
......\DE2_TV.flow.rpt
......\DE2_TV.map.rpt
......\DE2_TV.map.smsg
......\DE2_TV.map.summary
......\DE2_TV.pin
......\DE2_TV.pof
......\DE2_TV.qpf
......\DE2_TV.qsf
......\DE2_TV.qws
......\DE2_TV.sof
......\DE2_TV.tan.rpt
......\DE2_TV.tan.summary
......\DE2_TV.v
......\DE2_TV_assignment_defaults.qdf
......\DIV.v
......\I2C_AV_Config.v
......\I2C_Controller.v
......\ITU_656_Decoder.v
......\Line_Buffer.v
......\MAC_3.v
......\PLL.v
......\prev_cmp_DE2_TV.qmsg
......\README.txt
......\Reset_Delay.v
......\Sdram_Control_4Port\command.v
......\...................\control_interface.v
......\...................\Sdram_Control_4Port.v
......\...................\Sdram_Params.h
......\...................\Sdram_PLL.ppf
......\...................\Sdram_PLL.v
......\...................\Sdram_RD_FIFO.v
......\...................\Sdram_WR_FIFO.v
......\...................\sdr_data_path.v
......\SEG7_LUT.v
......\SEG7_LUT_8.v
......\TD_Detect.v
......\TP_RAM.v
......\VGA_Ctrl.v
......\YCbCr2RGB.v
......\YUV422_to_444.v
......\db
......\Sdram_Control_4Port
DE2_TV
......\db\DE2_TV.db_info
......\..\DE2_TV.eco.cdb
......\..\DE2_TV.sld_design_entry.sci
......\DE2_TV.asm.rpt
......\DE2_TV.done
......\DE2_TV.dpf
......\DE2_TV.fit.rpt
......\DE2_TV.fit.smsg
......\DE2_TV.fit.summary
......\DE2_TV.flow.rpt
......\DE2_TV.map.rpt
......\DE2_TV.map.smsg
......\DE2_TV.map.summary
......\DE2_TV.pin
......\DE2_TV.pof
......\DE2_TV.qpf
......\DE2_TV.qsf
......\DE2_TV.qws
......\DE2_TV.sof
......\DE2_TV.tan.rpt
......\DE2_TV.tan.summary
......\DE2_TV.v
......\DE2_TV_assignment_defaults.qdf
......\DIV.v
......\I2C_AV_Config.v
......\I2C_Controller.v
......\ITU_656_Decoder.v
......\Line_Buffer.v
......\MAC_3.v
......\PLL.v
......\prev_cmp_DE2_TV.qmsg
......\README.txt
......\Reset_Delay.v
......\Sdram_Control_4Port\command.v
......\...................\control_interface.v
......\...................\Sdram_Control_4Port.v
......\...................\Sdram_Params.h
......\...................\Sdram_PLL.ppf
......\...................\Sdram_PLL.v
......\...................\Sdram_RD_FIFO.v
......\...................\Sdram_WR_FIFO.v
......\...................\sdr_data_path.v
......\SEG7_LUT.v
......\SEG7_LUT_8.v
......\TD_Detect.v
......\TP_RAM.v
......\VGA_Ctrl.v
......\YCbCr2RGB.v
......\YUV422_to_444.v
......\db
......\Sdram_Control_4Port
DE2_TV