文件名称:ASI_IN1_and_ASI_OUT1

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.31mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 庄**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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这是对于从卫星接收下来的TS流,有两路流,对其选择,其中包括同步模块,PCR校正模块,码率调整模块-This is received from the satellite down for the TS stream, there are two streams of their choice, including the synchronization module, PCR correction module, rate adjustment module
相关搜索: PCR
ts
pcr
asi_in

(系统自动生成,下载前可以参看下载内容)

下载文件列表

ASI_IN1_and_ASI_OUT1\DVB_CSA\block23_cipher.bsf

....................\.......\block_to_byte.bsf

....................\.......\IB_RAM.bsf

....................\.......\init_block_RAM.bsf

....................\.......\Read_memory_control.bsf

....................\.......\scramble_FIFO.bsf

....................\.......\stream_block_cipher.bsf

....................\.......\parallel_CSA.bdf

....................\.......\parallel_CSA.qpf

....................\.......\parallel_CSA.qsf

....................\.......\CSA_Realization.bsf

....................\.......\parallel_CSA.done

....................\.......\data_rom.bsf

....................\.......\rom_data_address_generator.bsf

....................\.......\synchronization.bsf

....................\.......\controller.bsf

....................\.......\TS_DEMUX.bsf

....................\.......\TS_REMUX.bsf

....................\.......\header_FIFO.bsf

....................\.......\Channel_FIFO.bsf

....................\.......\not_cipher_payload_FIFO.bsf

....................\.......\parallel_CSA.map.summary

....................\.......\parallel_CSA.pin

....................\.......\parallel_CSA.fit.smsg

....................\.......\parallel_CSA.fit.summary

....................\.......\parallel_CSA.sof

....................\.......\parallel_CSA.pof

....................\.......\parallel_CSA.hexout

....................\.......\parallel_CSA.tan.summary

....................\.......\parallel_CSA.vwf

....................\.......\parallel_CSA.sim.rpt

....................\.......\block_cipher.bsf

....................\.......\asi_in.vhd

....................\.......\asi_syn.vhd

....................\.......\TS_FIFO.vhd

....................\.......\TS_FIFO.bsf

....................\.......\Control_CY7B923.bsf

....................\.......\TS_compare.bsf

....................\.......\asi_in.bsf

....................\.......\asi_syn.bsf

....................\.......\self_adapt_syn.bsf

....................\.......\Control_Input.bsf

....................\.......\parallel_CSA1.vwf

....................\.......\Add_Rest.bsf

....................\.......\Control0_CY7B923.vhd

....................\.......\Control0_CY7B923.bsf

....................\.......\TS_DEMUX_not_Fitter.bsf

....................\.......\Send_CY7B923.vhd

....................\.......\Check_Rate.bsf

....................\.......\Check_Apart_Bytes.bsf

....................\.......\Send_CY7B923.bsf

....................\.......\delay_half.bsf

....................\.......\parallel_CSA.bsf

....................\.......\text_head.bsf

....................\.......\find_input_header.bsf

....................\.......\Empty_packet_Filter.bsf

....................\.......\(未加扰的需要等待TS-OVER信号加扰的不用等待)复件 controller.vhd

....................\.......\TEXT_PLL_waveforms.html

....................\.......\TEXT_PLL_wave0.jpg

....................\.......\TEXT_FIFO_waveforms.html

....................\.......\TEXT_FIFO_wave0.jpg

....................\.......\parallel_CSA.cdf

....................\.......\parallel_CSA_assignment_defaults.qdf

....................\.......\parallel_CSA.jdi

....................\.......\TS_DEMUX_not_Fitter.vhd.bak

....................\.......\TS_compare.vhd.bak

....................\.......\parallel_CSA.dpf

....................\.......\TS_FIFO_waveforms.html

....................\.......\TS_FIFO_wave0.jpg

....................\.......\TS_FIFO.qip

....................\.......\delay_half.vhd.bak

....................\.......\delay_half.vhd

....................\.......\self_adapt_syn.vhd.bak

....................\.......\self_adapt_syn.vhd

....................\.......\Control_CY7B923.vhd.bak

....................\.......\Control_Input.vhd.bak

....................\.......\Control_Input.vhd

....................\.......\TS_DEMUX_not_Fitter.vhd

....................\.......\block_cipher_top.vhd.bak

....................\.......\TS_DEMUX.vhd.bak

....................\.......\TS_remux.vhd.bak

....................\.......\TS_remux.vhd

....................\.......\block_cipher_top.vhd

....................\.......\scramble_data.stp

....................\.......\unsc

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