文件名称:Micron_SDRAM_CNTR
- 所属分类：
- VHDL编程
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2012-11-26
- 文件大小：
- 291kb
- 下载次数：
- 0次
- 提 供 者：
- shang*****
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
下载
别用迅雷、360浏览器下载。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
如迅雷强制弹出，可右键点击选“另存为”。
失败请重下，重下不扣分。
介绍说明－－下载内容均来自于网络，请自行研究使用
/******************************************************************************
*
* File Name: sdrm.v
* Version: 1.14
* Date: Sept 9, 1999
* Descr iption: Top level module
* Dependencies: sdrm_t, sys_int
*
* Company: Xilinx
*
*
* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY
* WHATSOEVER AND XILINX SPECIFICALLY DISCLAIMS ANY
* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
*
* Copyright (c) 1998 Xilinx, Inc.
* All rights reserved
*
******************************************************************************/-/******************************************************************************
*
* File Name: sdrm.v
* Version: 1.14
* Date: Sept 9, 1999
* Descr iption: Top level module
* Dependencies: sdrm_t, sys_int
*
* Company: Xilinx
*
*
* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY
* WHATSOEVER AND XILINX SPECIFICALLY DISCLAIMS ANY
* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
*
* Copyright (c) 1998 Xilinx, Inc.
* All rights reserved
*
******************************************************************************/
*
* File Name: sdrm.v
* Version: 1.14
* Date: Sept 9, 1999
* Descr iption: Top level module
* Dependencies: sdrm_t, sys_int
*
* Company: Xilinx
*
*
* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY
* WHATSOEVER AND XILINX SPECIFICALLY DISCLAIMS ANY
* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
*
* Copyright (c) 1998 Xilinx, Inc.
* All rights reserved
*
******************************************************************************/-/******************************************************************************
*
* File Name: sdrm.v
* Version: 1.14
* Date: Sept 9, 1999
* Descr iption: Top level module
* Dependencies: sdrm_t, sys_int
*
* Company: Xilinx
*
*
* Disclaimer: THESE DESIGNS ARE PROVIDED "AS IS" WITH NO WARRANTY
* WHATSOEVER AND XILINX SPECIFICALLY DISCLAIMS ANY
* IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR
* A PARTICULAR PURPOSE, OR AGAINST INFRINGEMENT.
*
* Copyright (c) 1998 Xilinx, Inc.
* All rights reserved
*
******************************************************************************/
(系统自动生成,下载前可以参看下载内容)
下载文件列表
verilog\README
.......\synth\run_synth
.......\.....\sdrm.edf
.......\.....\sdrm.scr
.......\.....\setup.scr
.......\.rc\brst_cntr.v
.......\...\cslt_cntr.v
.......\...\define.v
.......\...\ki_cntr.v
.......\...\rcd_cntr.v
.......\...\ref_cntr.v
.......\...\sdrm.v
.......\...\sdrmc_state.v
.......\...\sdrm_t.v
.......\...\sys_int.v
.......\post_route\post_route.cfg
.......\..........\post_route.log
.......\..........\post_route.vpd
.......\..........\run_sim
.......\..........\sdrm_par.sdf
.......\..........\sdrm_par.v
.......\..........\string_decode_post_route.v
.......\..........\tb_post_route.v
.......\.ar\run_par
.......\...\sdrm.edf
.......\...\sdrm.ucf
.......\...\sdrm_par.sdf
.......\...\sdrm_par.v
.......\micron\bank0.txt
.......\......\bank1.txt
.......\......\mt48lc1m16a1-8a.v
.......\......\mt48lc1m16a1.v
.......\......\test.v
.......\func_sim\func_sim.cfg
.......\........\func_sim.log
.......\........\func_sim.vpd
.......\........\run_sim
.......\........\string_decode_fn.v
.......\........\tb_sdrm.v
.......\synth
.......\src
.......\post_route
.......\par
.......\micron
.......\func_sim
verilog
.......\synth\run_synth
.......\.....\sdrm.edf
.......\.....\sdrm.scr
.......\.....\setup.scr
.......\.rc\brst_cntr.v
.......\...\cslt_cntr.v
.......\...\define.v
.......\...\ki_cntr.v
.......\...\rcd_cntr.v
.......\...\ref_cntr.v
.......\...\sdrm.v
.......\...\sdrmc_state.v
.......\...\sdrm_t.v
.......\...\sys_int.v
.......\post_route\post_route.cfg
.......\..........\post_route.log
.......\..........\post_route.vpd
.......\..........\run_sim
.......\..........\sdrm_par.sdf
.......\..........\sdrm_par.v
.......\..........\string_decode_post_route.v
.......\..........\tb_post_route.v
.......\.ar\run_par
.......\...\sdrm.edf
.......\...\sdrm.ucf
.......\...\sdrm_par.sdf
.......\...\sdrm_par.v
.......\micron\bank0.txt
.......\......\bank1.txt
.......\......\mt48lc1m16a1-8a.v
.......\......\mt48lc1m16a1.v
.......\......\test.v
.......\func_sim\func_sim.cfg
.......\........\func_sim.log
.......\........\func_sim.vpd
.......\........\run_sim
.......\........\string_decode_fn.v
.......\........\tb_sdrm.v
.......\synth
.......\src
.......\post_route
.......\par
.......\micron
.......\func_sim
verilog