文件名称:OFDM_retiming
介绍说明--下载内容均来自于网络,请自行研究使用
基于Verilog的OFDM时钟恢复模块,在做全数字OFDM的时候是关键模块,可以在FPGA上实现。-Verilog-OFDM-based clock recovery module, doing all-digital OFDM time is the key module can be implemented on the FPGA.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
OFDM_retiming
.............\Correlating_and_Accumulating.v
.............\Magnitude_Simplified_Computing.v
.............\Match_Filtering.v
.............\Peak_Finding.v
.............\Quantization.v
.............\Simple_Correlation.v
.............\Symbol_Output.v
.............\Time_Syncronization.v
.............\Time_Syncronization_summary.html
.............\Timing_Symcronization.ise
.............\Timing_Symcronization.ise_ISE_Backup
.............\Timing_Symcronization.restore
.............\_xmsgs
.............\__ISE_repository_Timing_Symcronization.ise_.lock
.............\Correlating_and_Accumulating.v
.............\Magnitude_Simplified_Computing.v
.............\Match_Filtering.v
.............\Peak_Finding.v
.............\Quantization.v
.............\Simple_Correlation.v
.............\Symbol_Output.v
.............\Time_Syncronization.v
.............\Time_Syncronization_summary.html
.............\Timing_Symcronization.ise
.............\Timing_Symcronization.ise_ISE_Backup
.............\Timing_Symcronization.restore
.............\_xmsgs
.............\__ISE_repository_Timing_Symcronization.ise_.lock