文件名称:ARM-Verilog-HDL-IP-CORE
- 所属分类：
- 微处理器(ARM/PowerPC等)
- 资源属性：
- [Text]
- 上传时间：
- 2012-11-26
- 文件大小：
- 66kb
- 下载次数：
- 0次
- 提 供 者：
- he***
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
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下载文件列表
ARM Verilog HDL IP CORE\ABORTGenerator.vhd
.......................\ABusMultiplexer.vhd
.......................\AddressMux_Incrementer.vhd
.......................\AdrCtrlReg.vhd
.......................\ALU.vhd
.......................\ALUTesterSim.vhd
.......................\ARM7TDMIS_Top.vhd
.......................\ARMALUTestTop.vhd
.......................\ARMCoreSimTop.vhd
.......................\ARMMultiplierTestTop.vhd
.......................\ARMPackage.vhd
.......................\ARMShifterTestTop.vhd
.......................\ARMSimMemSubsystem.vhd
.......................\ARMSMSSPackage.vhd
.......................\BBusMultiplexer.vhd
.......................\BusMonitor.vhd
.......................\CLKENGenerator.vhd
.......................\ClockAndResetGenerator.vhd
.......................\ControlLogic.vhd
.......................\CycleCounter.vhd
.......................\DataMux.vhd
.......................\DataOutMux.vhd
.......................\Decoder.vhd
.......................\IPDR.vhd
.......................\LSAdrGen.vhd
.......................\MemoryRemapper.vhd
.......................\MSSCompPackage.vhd
.......................\Mul32x8Comb.vhd
.......................\MulCtrlAndRegs.vhd
.......................\Multiplier.vhd
.......................\MultiplierTestAdder.vhd
.......................\MultiplierTesterSim.vhd
.......................\PSR.vhd
.......................\RAM32B.vhd
.......................\RegFile.vhd
.......................\ResltBitMask.vhd
.......................\ROMS19FR.vhd
.......................\S19FRPackage.vhd
.......................\ShiftAmountReg.vhd
.......................\Shifter.vhd
.......................\ShifterTestbench.vhd
.......................\ShifterTesterSim.vhd
.......................\ThumbDecoder.vhd
.......................\使用说明请参看右侧注释===〉〉.txt
ARM Verilog HDL IP CORE
.......................\ABusMultiplexer.vhd
.......................\AddressMux_Incrementer.vhd
.......................\AdrCtrlReg.vhd
.......................\ALU.vhd
.......................\ALUTesterSim.vhd
.......................\ARM7TDMIS_Top.vhd
.......................\ARMALUTestTop.vhd
.......................\ARMCoreSimTop.vhd
.......................\ARMMultiplierTestTop.vhd
.......................\ARMPackage.vhd
.......................\ARMShifterTestTop.vhd
.......................\ARMSimMemSubsystem.vhd
.......................\ARMSMSSPackage.vhd
.......................\BBusMultiplexer.vhd
.......................\BusMonitor.vhd
.......................\CLKENGenerator.vhd
.......................\ClockAndResetGenerator.vhd
.......................\ControlLogic.vhd
.......................\CycleCounter.vhd
.......................\DataMux.vhd
.......................\DataOutMux.vhd
.......................\Decoder.vhd
.......................\IPDR.vhd
.......................\LSAdrGen.vhd
.......................\MemoryRemapper.vhd
.......................\MSSCompPackage.vhd
.......................\Mul32x8Comb.vhd
.......................\MulCtrlAndRegs.vhd
.......................\Multiplier.vhd
.......................\MultiplierTestAdder.vhd
.......................\MultiplierTesterSim.vhd
.......................\PSR.vhd
.......................\RAM32B.vhd
.......................\RegFile.vhd
.......................\ResltBitMask.vhd
.......................\ROMS19FR.vhd
.......................\S19FRPackage.vhd
.......................\ShiftAmountReg.vhd
.......................\Shifter.vhd
.......................\ShifterTestbench.vhd
.......................\ShifterTesterSim.vhd
.......................\ThumbDecoder.vhd
.......................\使用说明请参看右侧注释===〉〉.txt
ARM Verilog HDL IP CORE