文件名称:test1
- 所属分类:
- VHDL编程
- 资源属性:
- [VHDL] [源码]
- 上传时间:
- 2012-11-26
- 文件大小:
- 227kb
- 下载次数:
- 0次
- 提 供 者:
- fanqi*****
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
EDA verilog 简单编程 实现最基本的功能-EDA
(系统自动生成,下载前可以参看下载内容)
下载文件列表
test1\db\test1.asm.qmsg
.....\..\test1.asm_labs.ddb
.....\..\test1.cbx.xml
.....\..\test1.cmp.bpm
.....\..\test1.cmp.cdb
.....\..\test1.cmp.ecobp
.....\..\test1.cmp.hdb
.....\..\test1.cmp.logdb
.....\..\test1.cmp.rdb
.....\..\test1.cmp.tdb
.....\..\test1.cmp0.ddb
.....\..\test1.cmp_bb.cdb
.....\..\test1.cmp_bb.hdb
.....\..\test1.cmp_bb.logdb
.....\..\test1.cmp_bb.rcf
.....\..\test1.dbp
.....\..\test1.db_info
.....\..\test1.eco.cdb
.....\..\test1.fit.qmsg
.....\..\test1.hier_info
.....\..\test1.hif
.....\..\test1.map.bpm
.....\..\test1.map.cdb
.....\..\test1.map.ecobp
.....\..\test1.map.hdb
.....\..\test1.map.logdb
.....\..\test1.map.qmsg
.....\..\test1.map_bb.cdb
.....\..\test1.map_bb.hdb
.....\..\test1.map_bb.logdb
.....\..\test1.merge.qmsg
.....\..\test1.pre_map.cdb
.....\..\test1.pre_map.hdb
.....\..\test1.psp
.....\..\test1.pss
.....\..\test1.rtlv.hdb
.....\..\test1.rtlv_sg.cdb
.....\..\test1.rtlv_sg_swap.cdb
.....\..\test1.sgdiff.cdb
.....\..\test1.sgdiff.hdb
.....\..\test1.signalprobe.cdb
.....\..\test1.sld_design_entry.sci
.....\..\test1.sld_design_entry_dsc.sci
.....\..\test1.syn_hier_info
.....\..\test1.tan.qmsg
.....\test1.asm.rpt
.....\test1.done
.....\test1.fit.rpt
.....\test1.fit.smsg
.....\test1.fit.summary
.....\test1.flow.rpt
.....\test1.map.rpt
.....\test1.map.summary
.....\test1.merge.rpt
.....\test1.pin
.....\test1.pof
.....\test1.qpf
.....\test1.qsf
.....\test1.sof
.....\test1.tan.rpt
.....\test1.tan.summary
.....\test1.v
.....\db
test1
.....\..\test1.asm_labs.ddb
.....\..\test1.cbx.xml
.....\..\test1.cmp.bpm
.....\..\test1.cmp.cdb
.....\..\test1.cmp.ecobp
.....\..\test1.cmp.hdb
.....\..\test1.cmp.logdb
.....\..\test1.cmp.rdb
.....\..\test1.cmp.tdb
.....\..\test1.cmp0.ddb
.....\..\test1.cmp_bb.cdb
.....\..\test1.cmp_bb.hdb
.....\..\test1.cmp_bb.logdb
.....\..\test1.cmp_bb.rcf
.....\..\test1.dbp
.....\..\test1.db_info
.....\..\test1.eco.cdb
.....\..\test1.fit.qmsg
.....\..\test1.hier_info
.....\..\test1.hif
.....\..\test1.map.bpm
.....\..\test1.map.cdb
.....\..\test1.map.ecobp
.....\..\test1.map.hdb
.....\..\test1.map.logdb
.....\..\test1.map.qmsg
.....\..\test1.map_bb.cdb
.....\..\test1.map_bb.hdb
.....\..\test1.map_bb.logdb
.....\..\test1.merge.qmsg
.....\..\test1.pre_map.cdb
.....\..\test1.pre_map.hdb
.....\..\test1.psp
.....\..\test1.pss
.....\..\test1.rtlv.hdb
.....\..\test1.rtlv_sg.cdb
.....\..\test1.rtlv_sg_swap.cdb
.....\..\test1.sgdiff.cdb
.....\..\test1.sgdiff.hdb
.....\..\test1.signalprobe.cdb
.....\..\test1.sld_design_entry.sci
.....\..\test1.sld_design_entry_dsc.sci
.....\..\test1.syn_hier_info
.....\..\test1.tan.qmsg
.....\test1.asm.rpt
.....\test1.done
.....\test1.fit.rpt
.....\test1.fit.smsg
.....\test1.fit.summary
.....\test1.flow.rpt
.....\test1.map.rpt
.....\test1.map.summary
.....\test1.merge.rpt
.....\test1.pin
.....\test1.pof
.....\test1.qpf
.....\test1.qsf
.....\test1.sof
.....\test1.tan.rpt
.....\test1.tan.summary
.....\test1.v
.....\db
test1