文件名称:digital-lock
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电子密码锁
功能如下:
l、按键接口的设计
包括：
1）键盘扫描电路
2）弹跳消除电路
3）键盘译码电路
4）按键存储电路
2、密码锁的控制电路设计
包括：
1）按键的数字输入、存储及清除
2）功能按键的功能设计
3）移位寄存器的设计与控制
4）密码清除、变更、存储、激活电锁电路
5）密码核对、解除电锁电路
3、输出七段显示电路的设计
包括：
1）数据选择电路
2）BCD对七段显示译码电路
3）七段显示扫描电路
密码锁功能说明：
1、 数据输入：每按一个数字键，就输入一个数值，并在显示器上的最右方显示出该数值，并将先前已经输入的数据依序左移一个数字位置。
2、数码清除：按下此键可清除前面所有的输入值，清除成为“0000”。
3、密码更改：按下此键时将日前的数字设定成新的密码。
4、激活电锁：按下此键可将密码锁上锁。
5、解除电锁：按下此键会检查输入的密码是否正确，密码正确即开锁。
-Electronic locks
l, key interface design
Include:
1) The keyboard scanning circuit
2) bounce elimination circuit
3) Keyboard decoding circuit
4) The button memory circuit
2, the lock control circuit design
Include:
1) Press the digital input, storage and removal
2) The functional design of function keys
3) Design and Control of the shift register
4) remove the password, change, storage, activate the electric lock circuit
5) The password check, the lifting power lock circuit
3, the output of seven-segment display circuit
Include:
1) data selection circuit
2) BCD seven segment display decoder circuit of
3) seven segment display scanning circuit
Password Lock Function:
1, the data entry: Each press a number key to enter a value, and in the far right on the display shows the number and order of input data previously left a number of locations.
2, Digital Clear: Press this key to clear all previous input values , clear
功能如下:
l、按键接口的设计
包括：
1）键盘扫描电路
2）弹跳消除电路
3）键盘译码电路
4）按键存储电路
2、密码锁的控制电路设计
包括：
1）按键的数字输入、存储及清除
2）功能按键的功能设计
3）移位寄存器的设计与控制
4）密码清除、变更、存储、激活电锁电路
5）密码核对、解除电锁电路
3、输出七段显示电路的设计
包括：
1）数据选择电路
2）BCD对七段显示译码电路
3）七段显示扫描电路
密码锁功能说明：
1、 数据输入：每按一个数字键，就输入一个数值，并在显示器上的最右方显示出该数值，并将先前已经输入的数据依序左移一个数字位置。
2、数码清除：按下此键可清除前面所有的输入值，清除成为“0000”。
3、密码更改：按下此键时将日前的数字设定成新的密码。
4、激活电锁：按下此键可将密码锁上锁。
5、解除电锁：按下此键会检查输入的密码是否正确，密码正确即开锁。
-Electronic locks
l, key interface design
Include:
1) The keyboard scanning circuit
2) bounce elimination circuit
3) Keyboard decoding circuit
4) The button memory circuit
2, the lock control circuit design
Include:
1) Press the digital input, storage and removal
2) The functional design of function keys
3) Design and Control of the shift register
4) remove the password, change, storage, activate the electric lock circuit
5) The password check, the lifting power lock circuit
3, the output of seven-segment display circuit
Include:
1) data selection circuit
2) BCD seven segment display decoder circuit of
3) seven segment display scanning circuit
Password Lock Function:
1, the data entry: Each press a number key to enter a value, and in the far right on the display shows the number and order of input data previously left a number of locations.
2, Digital Clear: Press this key to clear all previous input values , clear
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下载文件列表
digital lock\digital lock\ceshi_1.bdf
............\............\ceshi_1.vwf
............\............\ceshi_2.bdf
............\............\ceshi_2.vwf
............\............\channel_chooser_4.bsf
............\............\channel_chooser_4.vhd
............\............\channel_chooser_4_4.bsf
............\............\channel_chooser_4_4.vhd
............\............\code_for_display_store_shift_reg_4_bytes.bsf
............\............\code_for_display_store_shift_reg_4_bytes.vhd
............\............\code_for_display_store_shift_reg_4_bytes.vwf
............\............\code_for_display_store_shift_reg_4_bytes_clk_signal_generator.bsf
............\............\code_for_display_store_shift_reg_4_bytes_clk_signal_generator.vhd
............\............\code_for_display_store_shift_reg_4_bytes_clk_signal_generator.vwf
............\............\control_signal_provider.bsf
............\............\control_signal_provider.vhd
............\............\db\digital_lock.db_info
............\............\..\digital_lock.eco.cdb
............\............\..\digital_lock.sim_ori.vwf
............\............\..\digital_lock.sld_design_entry.sci
............\............\..\wed.wsf
............\............\..\wed.zsf
............\............\digital_lock.asm.rpt
............\............\digital_lock.bdf
............\............\digital_lock.done
............\............\digital_lock.fit.rpt
............\............\digital_lock.fit.smsg
............\............\digital_lock.fit.summary
............\............\digital_lock.flow.rpt
............\............\digital_lock.map.rpt
............\............\digital_lock.map.summary
............\............\digital_lock.pin
............\............\digital_lock.pof
............\............\digital_lock.qpf
............\............\digital_lock.qsf
............\............\digital_lock.sim.rpt
............\............\digital_lock.sof
............\............\digital_lock.tan.rpt
............\............\digital_lock.tan.summary
............\............\digital_lock.vwf
............\............\digital_lock_assignment_defaults.qdf
............\............\divider_128.bsf
............\............\divider_128.vhd
............\............\divider_2.bsf
............\............\divider_2.vhd
............\............\keypad_4_4_interface.bdf
............\............\keypad_4_4_interface.bsf
............\............\keys_lines_to_bus_transform.bsf
............\............\keys_lines_to_bus_transform.vhd
............\............\keys_lines_to_bus_transform.vwf
............\............\key_pad_4_4.bdf
............\............\key_pad_4_4.bsf
............\............\lock_control.bsf
............\............\lock_control.vhd
............\............\lock_control.vwf
............\............\reg_bit.bsf
............\............\reg_bit.vhd
............\............\reg_bit_with_initial_state.bsf
............\............\reg_bit_with_initial_state.vhd
............\............\set_code.bsf
............\............\set_code.vhd
............\............\set_code.vwf
............\............\shift_reg_2.bsf
............\............\shift_reg_2.vhd
............\使用说明.doc
............\题目要求.doc
............\digital lock\db
............\digital lock
digital lock
............\............\ceshi_1.vwf
............\............\ceshi_2.bdf
............\............\ceshi_2.vwf
............\............\channel_chooser_4.bsf
............\............\channel_chooser_4.vhd
............\............\channel_chooser_4_4.bsf
............\............\channel_chooser_4_4.vhd
............\............\code_for_display_store_shift_reg_4_bytes.bsf
............\............\code_for_display_store_shift_reg_4_bytes.vhd
............\............\code_for_display_store_shift_reg_4_bytes.vwf
............\............\code_for_display_store_shift_reg_4_bytes_clk_signal_generator.bsf
............\............\code_for_display_store_shift_reg_4_bytes_clk_signal_generator.vhd
............\............\code_for_display_store_shift_reg_4_bytes_clk_signal_generator.vwf
............\............\control_signal_provider.bsf
............\............\control_signal_provider.vhd
............\............\db\digital_lock.db_info
............\............\..\digital_lock.eco.cdb
............\............\..\digital_lock.sim_ori.vwf
............\............\..\digital_lock.sld_design_entry.sci
............\............\..\wed.wsf
............\............\..\wed.zsf
............\............\digital_lock.asm.rpt
............\............\digital_lock.bdf
............\............\digital_lock.done
............\............\digital_lock.fit.rpt
............\............\digital_lock.fit.smsg
............\............\digital_lock.fit.summary
............\............\digital_lock.flow.rpt
............\............\digital_lock.map.rpt
............\............\digital_lock.map.summary
............\............\digital_lock.pin
............\............\digital_lock.pof
............\............\digital_lock.qpf
............\............\digital_lock.qsf
............\............\digital_lock.sim.rpt
............\............\digital_lock.sof
............\............\digital_lock.tan.rpt
............\............\digital_lock.tan.summary
............\............\digital_lock.vwf
............\............\digital_lock_assignment_defaults.qdf
............\............\divider_128.bsf
............\............\divider_128.vhd
............\............\divider_2.bsf
............\............\divider_2.vhd
............\............\keypad_4_4_interface.bdf
............\............\keypad_4_4_interface.bsf
............\............\keys_lines_to_bus_transform.bsf
............\............\keys_lines_to_bus_transform.vhd
............\............\keys_lines_to_bus_transform.vwf
............\............\key_pad_4_4.bdf
............\............\key_pad_4_4.bsf
............\............\lock_control.bsf
............\............\lock_control.vhd
............\............\lock_control.vwf
............\............\reg_bit.bsf
............\............\reg_bit.vhd
............\............\reg_bit_with_initial_state.bsf
............\............\reg_bit_with_initial_state.vhd
............\............\set_code.bsf
............\............\set_code.vhd
............\............\set_code.vwf
............\............\shift_reg_2.bsf
............\............\shift_reg_2.vhd
............\使用说明.doc
............\题目要求.doc
............\digital lock\db
............\digital lock
digital lock