文件名称:pinlvup
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利用XILINX的SPARTAN-3A系列的XC3S200A的FPGA为载体，以VHDL为系统逻辑描述的表达方式，完成的数字频率计的设计。-SPARTAN-3A XILINX the use of the FPGA family XC3S200A to vector to the system Logic VHDL descr iption expressions, completed the design of Digital Frequency Meter.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
pinlvup\control.sym
.......\control.vhd
.......\count.sym
.......\count.vhd
.......\count_bottom.vhd
.......\fenpin.sym
.......\fenpin.vhd
.......\latch.sym
.......\latch.vhd
.......\multi.sym
.......\multi.vhd
.......\pinlv_up.sch
.......\pinlv_up.schlog
.......\pinlv_up.ucf
.......\pinlv_up_guide.ncd
.......\pinlv_up_summary.html
.......\project_up.ise
.......\project_up.ise_ISE_Backup
.......\project_up.restore
.......\__ISE_repository_project_up.ise_.lock
pinlvup
.......\control.vhd
.......\count.sym
.......\count.vhd
.......\count_bottom.vhd
.......\fenpin.sym
.......\fenpin.vhd
.......\latch.sym
.......\latch.vhd
.......\multi.sym
.......\multi.vhd
.......\pinlv_up.sch
.......\pinlv_up.schlog
.......\pinlv_up.ucf
.......\pinlv_up_guide.ncd
.......\pinlv_up_summary.html
.......\project_up.ise
.......\project_up.ise_ISE_Backup
.......\project_up.restore
.......\__ISE_repository_project_up.ise_.lock
pinlvup