codes\an_inverter.vhd

.....\automake.log

.....\controller_unit_first.cmd_log

.....\controller_unit_first.lso

.....\controller_unit_first.ngr

.....\controller_unit_first.prj

.....\controller_unit_first.stx

.....\controller_unit_first.syr

.....\controller_unit_first.ucf

.....\controller_unit_first.vhd

.....\controller_unit_second.vhd

.....\controller_unit_third.vhd

.....\datapath_unit.vhd

.....\datapath_unit1.vhd

.....\datapath_unit2.vhd

.....\D_flipflop.vhd

.....\eight_nbit_register_file.vhd

.....\first_microprogram.ucf

.....\first_microprogram.vhd

.....\first_microprogram_tb.vhd

.....\first_microprogram_tb_vhd.fdo

.....\first_microprogram_tb_vhd.udo

.....\four_bit_adder_subtractor.vhd

.....\four_bit_alu.vhd

.....\four_bit_arithmetic_unit.vhd

.....\four_bit_LAC.vhd

.....\four_bit_lac_adder.vhd

.....\four_bit_shifter.vhd

.....\four_input_multiplexer.vhd

.....\full_adder.vhd

.....\function_decoder_logic.vhd

.....\half_adder.vhd

.....\Lab6.dhp

.....\Lab6.ise

.....\Lab6.ise_ISE_Backup

.....\logic_slice.vhd

.....\nbit_adder.vhd

.....\nbit_incrementer.vhd

.....\nbit_load_hold_reg.vhd

.....\nbit_logic_unit.vhd

.....\nbit_reg.vhd

.....\nbit_RFC_register.vhd

.....\nbit_syn_counter_with_palloadinput.vhd

.....\nbit_two_input_mux.vhd

.....\nbit_xor_contol.vhd

.....\output_rom_first.vhd

.....\output_rom_second.vhd

.....\output_rom_third.vhd

.....\pepExtractor.prj

.....\register_file_cell.vhd

.....\second_microprogram.ucf

.....\second_microprogram.vhd

.....\second_microprogram_tb.vhd

.....\second_microprogram_tb_vhd.fdo

.....\second_microprogram_tb_vhd.udo

.....\shift_control_logic.vhd

.....\shift_rotate.vhd

.....\third_microprogram.ucf

.....\third_microprogram.vhd

.....\third_microprogram_tb.vhd

.....\third_microprogram_tb_vhd.fdo

.....\third_microprogram_tb_vhd.udo

.....\three_to_eight_decoder.vhd

.....\transcript

.....\tri_buff.vhd

.....\two_input_and.vhd

.....\two_input_multiplexer.vhd

.....\two_input_mux.vhd

.....\two_input_or.vhd

.....\two_input_xor.vhd

.....\vsim.wlf

.....\work\an_inverter\behavioral.dat

.....\....\...........\behavioral.dbs

.....\....\...........\behavioral.psm

.....\....\...........\_primary.dat

.....\....\...........\_primary.dbs

.....\....\controller_unit_first\behavioral.dat

.....\....\.....................\behavioral.dbs

.....\....\.....................\behavioral.psm

.....\....\.....................\_primary.dat

.....\....\.....................\_primary.dbs

.....\....\................second\behavioral.dat

.....\....\......................\behavioral.dbs

.....\....\......................\behavioral.psm

.....\....\......................\_primary.dat

.....\....\......................\_primary.dbs

.....\....\................third\behavioral.dat

.....\....\.....................\behavioral.dbs

.....\....\.....................\behavioral.psm

.....\....\.....................\_primary.dat

.....\....\.....................\_primary.dbs

.....\....\datapath_unit\behavioral.dat

.....\....\.............\behavioral.dbs

.....\....\.............\behavioral.psm

.....\....\.............\_primary.dat

.....\....\.............\_primary.dbs

.....\....\.............1\behavioral.dat

.....\....\..............\behavioral.dbs

.....\....\..............\behavioral.psm

.....\....\..............\_primary.dat