为了对FPGA 的资源占用量最小，以便实现

片上系统(SoC)设计，充分利用了上下变频过程中I，Q 数据流的特点，仅用一套滤波器运算单元分时复用对I，Q

滤波，同时详细研究了滤波器的转置结构和位平面结构对FPGA资源占用量的差别。-Benefiting from the characteristics of I and Q data streams in the converter。

one set of computation units is multiplexed to filter I and Q data streams．Meanwhile。the fil—

ter traditional transpose structure and bit—plane structure are explored and synthesized．Simu—

lation indicates that the bit—plane structure only occupies half of the logic resources used by the

transpose structure