文件名称:VGA_Verilog
介绍说明－－下载内容均来自于网络，请自行研究使用
文件中包含EP2C8Q208C8系列FPGA的VGA口的语言程序，可以直接在硬件板子上使用，以经过测试-File contains EP2C8Q208C8 Series VGA port FPGA-language program, you can use directly on the hardware board to be tested
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VGA_Verilog\db\prev_cmp_VGA.asm.qmsg
...........\..\prev_cmp_VGA.fit.qmsg
...........\..\prev_cmp_VGA.map.qmsg
...........\..\prev_cmp_VGA.tan.qmsg
...........\..\VGA.asm.qmsg
...........\..\VGA.asm_labs.ddb
...........\..\VGA.cbx.xml
...........\..\VGA.cmp.cdb
...........\..\VGA.cmp.hdb
...........\..\VGA.cmp.logdb
...........\..\VGA.cmp.rdb
...........\..\VGA.cmp.tdb
...........\..\VGA.cmp0.ddb
...........\..\VGA.cmp2.ddb
...........\..\VGA.db_info
...........\..\VGA.eco.cdb
...........\..\VGA.fit.qmsg
...........\..\VGA.hier_info
...........\..\VGA.hif
...........\..\VGA.map.cdb
...........\..\VGA.map.hdb
...........\..\VGA.map.logdb
...........\..\VGA.map.qmsg
...........\..\VGA.pre_map.cdb
...........\..\VGA.pre_map.hdb
...........\..\VGA.rtlv.hdb
...........\..\VGA.rtlv_sg.cdb
...........\..\VGA.rtlv_sg_swap.cdb
...........\..\VGA.sgdiff.cdb
...........\..\VGA.sgdiff.hdb
...........\..\VGA.signalprobe.cdb
...........\..\VGA.sld_design_entry.sci
...........\..\VGA.sld_design_entry_dsc.sci
...........\..\VGA.syn_hier_info
...........\..\VGA.tan.qmsg
...........\..\VGA.tis_db_list.ddb
...........\..\VGA.tmw_info
...........\VGA.asm.rpt
...........\VGA.cdf
...........\VGA.done
...........\VGA.fit.eqn
...........\VGA.fit.rpt
...........\VGA.fit.smsg
...........\VGA.fit.summary
...........\VGA.flow.rpt
...........\VGA.map.eqn
...........\VGA.map.rpt
...........\VGA.map.summary
...........\VGA.pin
...........\VGA.pof
...........\VGA.qpf
...........\VGA.qsf
...........\VGA.qws
...........\VGA.sof
...........\VGA.tan.rpt
...........\VGA.tan.summary
...........\VGA.v
...........\VGA.vhd
...........\VGA_assignment_defaults.qdf
...........\db
VGA_Verilog
...........\..\prev_cmp_VGA.fit.qmsg
...........\..\prev_cmp_VGA.map.qmsg
...........\..\prev_cmp_VGA.tan.qmsg
...........\..\VGA.asm.qmsg
...........\..\VGA.asm_labs.ddb
...........\..\VGA.cbx.xml
...........\..\VGA.cmp.cdb
...........\..\VGA.cmp.hdb
...........\..\VGA.cmp.logdb
...........\..\VGA.cmp.rdb
...........\..\VGA.cmp.tdb
...........\..\VGA.cmp0.ddb
...........\..\VGA.cmp2.ddb
...........\..\VGA.db_info
...........\..\VGA.eco.cdb
...........\..\VGA.fit.qmsg
...........\..\VGA.hier_info
...........\..\VGA.hif
...........\..\VGA.map.cdb
...........\..\VGA.map.hdb
...........\..\VGA.map.logdb
...........\..\VGA.map.qmsg
...........\..\VGA.pre_map.cdb
...........\..\VGA.pre_map.hdb
...........\..\VGA.rtlv.hdb
...........\..\VGA.rtlv_sg.cdb
...........\..\VGA.rtlv_sg_swap.cdb
...........\..\VGA.sgdiff.cdb
...........\..\VGA.sgdiff.hdb
...........\..\VGA.signalprobe.cdb
...........\..\VGA.sld_design_entry.sci
...........\..\VGA.sld_design_entry_dsc.sci
...........\..\VGA.syn_hier_info
...........\..\VGA.tan.qmsg
...........\..\VGA.tis_db_list.ddb
...........\..\VGA.tmw_info
...........\VGA.asm.rpt
...........\VGA.cdf
...........\VGA.done
...........\VGA.fit.eqn
...........\VGA.fit.rpt
...........\VGA.fit.smsg
...........\VGA.fit.summary
...........\VGA.flow.rpt
...........\VGA.map.eqn
...........\VGA.map.rpt
...........\VGA.map.summary
...........\VGA.pin
...........\VGA.pof
...........\VGA.qpf
...........\VGA.qsf
...........\VGA.qws
...........\VGA.sof
...........\VGA.tan.rpt
...........\VGA.tan.summary
...........\VGA.v
...........\VGA.vhd
...........\VGA_assignment_defaults.qdf
...........\db
VGA_Verilog