文件名称:iiscode
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用Verilog写的一个简单的IIs控制器，分为clkgen时钟分频模块和transcon传输控制模块。其中transcon模块主要部分为一个有限状态机实现的满足IIS标准的输出。
另附一个简单的Testcase以及得到的波形。-Develop an iis controller with verilog hdl. The key parts of iis were departed in two. One is clkgen.v which generate the clk and sync singnal we want and the transcon.v is used for contrl the FSM of the iis.
另附一个简单的Testcase以及得到的波形。-Develop an iis controller with verilog hdl. The key parts of iis were departed in two. One is clkgen.v which generate the clk and sync singnal we want and the transcon.v is used for contrl the FSM of the iis.
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下载文件列表
all code\clkgen.v
........\clkgen.v~
........\DUMP_FILE_iis.fsdb
........\DUMP_FILE_iis.fsdb.fsdb
........\novas.rc
........\rt_shell_command.log
........\runvcs
........\runvcs~
........\simv
........\test.v
........\test.v~
........\top.v
........\transcon.v
........\transcon.v~
........\vcs.key
........\vcs.log
........\.fastLog\pes.bat
........\........\turbo.log
........\simv.daidir\5NrI.tt
........\...........\adhsoptmap.dat
........\...........\AllModulesSkeletons.db
........\...........\covg_defs
........\...........\didmap.db
........\...........\hsdefbe.db
........\...........\hsim.db
........\...........\hsim_bc.dat
........\...........\hsim_elab.db
........\...........\hsim_elabout.db
........\...........\hsim_fegate.db
........\...........\hsim_fs.dat
........\...........\hsim_gate.db
........\...........\hsim_gate_op_ip_map.dat
........\...........\hsim_ldr.dat
........\...........\hsim_lvl.db
........\...........\hsim_merge.db
........\...........\hsim_t0p.dat
........\...........\hsim_tables.dat
........\...........\iR5M_1.tt
........\...........\mnmn.db
........\...........\modfilename.db
........\...........\offfilename.db
........\...........\partition.db
........\...........\rmapats.dat
........\...........\str.db
........\...........\topmodules
........\...........\vcselabref.db
........\...........\vcs_rebuild
........\...........\_VCSgd_2l8Qsc_1.db
........\...........\_VCSgd_2l8Qsc_1.did
........\...........\_VCSgd_dnHAIe_1.db
........\...........\_VCSgd_dnHAIe_1.did
........\...........\_VCSgd_nGFE7b_1.db
........\...........\_VCSgd_nGFE7b_1.did
........\...........\_VCSgd_SrFmIc_1.db
........\...........\_VCSgd_SrFmIc_1.did
........\debussyLog\compiler.log
........\..........\debussy.cmd
........\..........\debussy.cmd.bak
........\..........\exe.log
........\..........\novas.rc
........\..........\pes.bat
........\..........\ToNetlist.log
........\..........\turbo.log
........\..........\verdi.log
........\csrc\5NrIB_d.o
........\....\5NrI_d.o
........\....\5NrI_d.o.incr
........\....\filelist
........\....\idincr.db
........\....\iR5M_1_d.o
........\....\iR5M_1_d.o.incr
........\....\Makefile
........\....\product_timestamp
........\....\rmapats.c
........\....\rmapats.h
........\....\rmapats.m
........\....\rmapats.o
........\....\rmapats_mop.o
........\....\SIM_l.o
........\....\vcsconst.incr
........\....\vcspieces.incr
........\....\vcstype.incr
........\....\hsim\5NrI.dat
........\....\....\5NrI_def.dat
........\....\....\iR5M_1.dat
........\....\....\iR5M_1_def.dat
........\....\hsim
........\vfastLog
........\simv.daidir
........\debussyLog
........\csrc
all code
........\clkgen.v~
........\DUMP_FILE_iis.fsdb
........\DUMP_FILE_iis.fsdb.fsdb
........\novas.rc
........\rt_shell_command.log
........\runvcs
........\runvcs~
........\simv
........\test.v
........\test.v~
........\top.v
........\transcon.v
........\transcon.v~
........\vcs.key
........\vcs.log
........\.fastLog\pes.bat
........\........\turbo.log
........\simv.daidir\5NrI.tt
........\...........\adhsoptmap.dat
........\...........\AllModulesSkeletons.db
........\...........\covg_defs
........\...........\didmap.db
........\...........\hsdefbe.db
........\...........\hsim.db
........\...........\hsim_bc.dat
........\...........\hsim_elab.db
........\...........\hsim_elabout.db
........\...........\hsim_fegate.db
........\...........\hsim_fs.dat
........\...........\hsim_gate.db
........\...........\hsim_gate_op_ip_map.dat
........\...........\hsim_ldr.dat
........\...........\hsim_lvl.db
........\...........\hsim_merge.db
........\...........\hsim_t0p.dat
........\...........\hsim_tables.dat
........\...........\iR5M_1.tt
........\...........\mnmn.db
........\...........\modfilename.db
........\...........\offfilename.db
........\...........\partition.db
........\...........\rmapats.dat
........\...........\str.db
........\...........\topmodules
........\...........\vcselabref.db
........\...........\vcs_rebuild
........\...........\_VCSgd_2l8Qsc_1.db
........\...........\_VCSgd_2l8Qsc_1.did
........\...........\_VCSgd_dnHAIe_1.db
........\...........\_VCSgd_dnHAIe_1.did
........\...........\_VCSgd_nGFE7b_1.db
........\...........\_VCSgd_nGFE7b_1.did
........\...........\_VCSgd_SrFmIc_1.db
........\...........\_VCSgd_SrFmIc_1.did
........\debussyLog\compiler.log
........\..........\debussy.cmd
........\..........\debussy.cmd.bak
........\..........\exe.log
........\..........\novas.rc
........\..........\pes.bat
........\..........\ToNetlist.log
........\..........\turbo.log
........\..........\verdi.log
........\csrc\5NrIB_d.o
........\....\5NrI_d.o
........\....\5NrI_d.o.incr
........\....\filelist
........\....\idincr.db
........\....\iR5M_1_d.o
........\....\iR5M_1_d.o.incr
........\....\Makefile
........\....\product_timestamp
........\....\rmapats.c
........\....\rmapats.h
........\....\rmapats.m
........\....\rmapats.o
........\....\rmapats_mop.o
........\....\SIM_l.o
........\....\vcsconst.incr
........\....\vcspieces.incr
........\....\vcstype.incr
........\....\hsim\5NrI.dat
........\....\....\5NrI_def.dat
........\....\....\iR5M_1.dat
........\....\....\iR5M_1_def.dat
........\....\hsim
........\vfastLog
........\simv.daidir
........\debussyLog
........\csrc
all code