文件名称:reset
介绍说明--下载内容均来自于网络,请自行研究使用
project2 in vhdl xilinx sparten 3-project2 in vhdl xilinx sparten 3
(系统自动生成,下载前可以参看下载内容)
下载文件列表
mix_project\dff\dff.ise_ISE_Backup
...........\...\dff.restore
...........\...\dff.ise
...........\.d\b_isim_beh.wfs
...........\..\dd.ise_ISE_Backup
...........\..\aa.v
...........\..\aa_summary.html
...........\..\dd.restore
...........\..\dd.ise
...........\.ecoder\decoder.restore
...........\.......\decoder.ise
...........\.......\dec.prj
...........\.......\dec.xst
...........\.......\dec.stx
...........\.......\.lso
...........\.......\dec_vhdl.prj
...........\.......\decoder.ise_ISE_Backup
...........\.......\dec.vhd
...........\.......\dec_summary.html
...........\.......\_xmsgs\xst.xmsgs
...........\.......\xst\work\hdpdeps.ref
...........\.......\...\....\hdllib.ref
...........\.......\...\....\sub00\vhpl00.vho
...........\praoject\__ISE_repository_praoject.ise_.lock
...........\........\main_bencher.prj
...........\........\input_and_fullckt.stx
...........\........\praoject.ise
...........\........\praoject.restore
...........\........\input_and_fullckt_vhdl.prj
...........\........\praoject.ise_ISE_Backup
...........\........\input_and_fullckt.bld
...........\........\main.xwv
...........\........\main.xwv_bak
...........\........\main.tfw
...........\........\main.ant
...........\........\main.tbw
...........\........\main.jhd
...........\........\input_and_fullckt.ngd
...........\........\tmperr.err
...........\........\input_and_fullckt.rpt
...........\........\input_and_fullckt.xml
...........\........\input_and_fullckt_build.xml
...........\........\main_beh.prj
...........\........\xilinxsim.ini
...........\........\input_and_fullckt.pad
...........\........\input_and_fullckt_pad.csv
...........\........\input_and_fullckt.ngc
...........\........\main_isim_beh.exe
...........\........\isim.cmd
...........\........\isim.log
...........\........\isimwavedata.xwv
...........\........\isim.hdlsourcefiles
...........\........\COMPLEMENT.vhd
...........\........\FA.vhd
...........\........\full_adder.vhd
...........\........\input_and_fullckt.v
...........\........\input_switches.v
...........\........\lcd_display.v
...........\........\lcd_write_number.v
...........\........\lcd_write_number_test.v
...........\........\MAPPING.vhd
...........\........\MODSUB1.vhd
...........\........\MODSUB2.vhd
...........\........\PROJECT1.vhd
...........\........\ROTATION.vhd
...........\........\ROTATION_ONES_COMPLEMENT.vhd
...........\........\sum_to_lcd.v
...........\........\top_module_lcd.v
...........\........\simulate_dofile.log
...........\........\main_isim_beh.wfs
...........\........\input_and_fullckt.ngr
...........\........\input_and_fullckt.prj
...........\........\input_and_fullckt.xst
...........\........\input_and_fullckt.cmd_log
...........\........\input_and_fullckt.syr
...........\........\input_and_fullckt.lso
...........\........\xst\work\hdllib.ref
...........\........\...\....\hdpdeps.ref
...........\........\...\....\sub00\vhpl00.vho
...........\........\...\....\.....\vhpl01.vho
...........\........\...\....\.....\vhpl02.vho
...........\........\...\....\.....\vhpl03.vho
...........\........\...\....\.....\vhpl04.vho
...........\........\...\....\.....\vhpl05.vho
...........\........\...\....\.....\vhpl06.vho
...........\........\...\....\.....\vhpl07.vho
...........\........\...\....\.....\vhpl08.vho
...........\........\...\....\.....\vhpl09.vho
...........\........\...\....\.....\vhpl10.vho
...........\........\...\....\.....\vhpl11.vho
...........\........\...\....\.....\vhpl12.vho
...........\........\...\....\.....\vhpl13.vho
...........\........\...\....\.....\vhpl14.vho
...........\........\...\....\.....\vhpl15.vho
...........\........\...\....\.....\vhpl16.vho
...........\........\...\....\.....\vhpl17.vho
...........\........\...\....\vlg42\input__and__fullckt.bin
...........\........\...\....\...2E\top__module__lcd.bin
...........\........\...\....\...1D\debounce.bin
...........\........\...\....\...6D\input__switches.bin
...........\...\dff.restore
...........\...\dff.ise
...........\.d\b_isim_beh.wfs
...........\..\dd.ise_ISE_Backup
...........\..\aa.v
...........\..\aa_summary.html
...........\..\dd.restore
...........\..\dd.ise
...........\.ecoder\decoder.restore
...........\.......\decoder.ise
...........\.......\dec.prj
...........\.......\dec.xst
...........\.......\dec.stx
...........\.......\.lso
...........\.......\dec_vhdl.prj
...........\.......\decoder.ise_ISE_Backup
...........\.......\dec.vhd
...........\.......\dec_summary.html
...........\.......\_xmsgs\xst.xmsgs
...........\.......\xst\work\hdpdeps.ref
...........\.......\...\....\hdllib.ref
...........\.......\...\....\sub00\vhpl00.vho
...........\praoject\__ISE_repository_praoject.ise_.lock
...........\........\main_bencher.prj
...........\........\input_and_fullckt.stx
...........\........\praoject.ise
...........\........\praoject.restore
...........\........\input_and_fullckt_vhdl.prj
...........\........\praoject.ise_ISE_Backup
...........\........\input_and_fullckt.bld
...........\........\main.xwv
...........\........\main.xwv_bak
...........\........\main.tfw
...........\........\main.ant
...........\........\main.tbw
...........\........\main.jhd
...........\........\input_and_fullckt.ngd
...........\........\tmperr.err
...........\........\input_and_fullckt.rpt
...........\........\input_and_fullckt.xml
...........\........\input_and_fullckt_build.xml
...........\........\main_beh.prj
...........\........\xilinxsim.ini
...........\........\input_and_fullckt.pad
...........\........\input_and_fullckt_pad.csv
...........\........\input_and_fullckt.ngc
...........\........\main_isim_beh.exe
...........\........\isim.cmd
...........\........\isim.log
...........\........\isimwavedata.xwv
...........\........\isim.hdlsourcefiles
...........\........\COMPLEMENT.vhd
...........\........\FA.vhd
...........\........\full_adder.vhd
...........\........\input_and_fullckt.v
...........\........\input_switches.v
...........\........\lcd_display.v
...........\........\lcd_write_number.v
...........\........\lcd_write_number_test.v
...........\........\MAPPING.vhd
...........\........\MODSUB1.vhd
...........\........\MODSUB2.vhd
...........\........\PROJECT1.vhd
...........\........\ROTATION.vhd
...........\........\ROTATION_ONES_COMPLEMENT.vhd
...........\........\sum_to_lcd.v
...........\........\top_module_lcd.v
...........\........\simulate_dofile.log
...........\........\main_isim_beh.wfs
...........\........\input_and_fullckt.ngr
...........\........\input_and_fullckt.prj
...........\........\input_and_fullckt.xst
...........\........\input_and_fullckt.cmd_log
...........\........\input_and_fullckt.syr
...........\........\input_and_fullckt.lso
...........\........\xst\work\hdllib.ref
...........\........\...\....\hdpdeps.ref
...........\........\...\....\sub00\vhpl00.vho
...........\........\...\....\.....\vhpl01.vho
...........\........\...\....\.....\vhpl02.vho
...........\........\...\....\.....\vhpl03.vho
...........\........\...\....\.....\vhpl04.vho
...........\........\...\....\.....\vhpl05.vho
...........\........\...\....\.....\vhpl06.vho
...........\........\...\....\.....\vhpl07.vho
...........\........\...\....\.....\vhpl08.vho
...........\........\...\....\.....\vhpl09.vho
...........\........\...\....\.....\vhpl10.vho
...........\........\...\....\.....\vhpl11.vho
...........\........\...\....\.....\vhpl12.vho
...........\........\...\....\.....\vhpl13.vho
...........\........\...\....\.....\vhpl14.vho
...........\........\...\....\.....\vhpl15.vho
...........\........\...\....\.....\vhpl16.vho
...........\........\...\....\.....\vhpl17.vho
...........\........\...\....\vlg42\input__and__fullckt.bin
...........\........\...\....\...2E\top__module__lcd.bin
...........\........\...\....\...1D\debounce.bin
...........\........\...\....\...6D\input__switches.bin