文件名称:DE2_Default
介绍说明－－下载内容均来自于网络，请自行研究使用
自己编程的采用verilog语言实现的关于altera的DE2-70开发板的一个实用程序，实现的是自动售货机的找零功能-Own programming language used on the altera verilog the DE2-70 development board of a utility, to achieve the change for vending machines function
(系统自动生成,下载前可以参看下载内容)
下载文件列表
DE2_Default\AUDIO_DAC.v
...........\DE2_Default.v.bak
...........\DE2_Default.cdf
...........\DE2_Default.done
...........\DE2_Default.v
...........\DE2_Default.fit.smsg
...........\DE2_Default.fit.summary
...........\DE2_Default.map.rpt
...........\DE2_Default.flow.rpt
...........\DE2_Default.map.summary
...........\DE2_Default.pin
...........\DE2_Default.pof
...........\DE2_Default.qpf
...........\DE2_Default.qsf
...........\DE2_Default.fit.rpt
...........\DE2_Default.sof
...........\DE2_Default.tan.rpt
...........\DE2_Default.tan.summary
...........\codeclock.vhd
...........\DE2_Default_assignment_defaults.qdf
...........\I2C_AV_Config.v
...........\I2C_Controller.v
...........\Img_DATA.hex
...........\LCD_Controller.v
...........\LCD_TEST.v
...........\README.txt
...........\Reset_Delay.v
...........\SEG7_LUT.v
...........\SEG7_LUT_8.v
...........\VGA_Audio_PLL.v
...........\....Controller\Img_DATA.hex
...........\..............\Img_RAM.v
...........\..............\VGA_Controller.v
...........\..............\VGA_OSD_RAM.v
...........\..............\VGA_Param.h
...........\db\altsyncram_p132.tdf
...........\..\altsyncram_q7o1.tdf
...........\..\altsyncram_vpv.tdf
...........\..\DE2_Default.hier_info
...........\..\DE2_Default.pre_map.hdb
...........\..\DE2_Default.pre_map.cdb
...........\..\prev_cmp_DE2_Default.qmsg
...........\..\DE2_Default.rtlv_sg.cdb
...........\..\DE2_Default.smp_dump.txt
...........\..\DE2_Default.fit.qmsg
...........\..\DE2_Default.map.qmsg
...........\..\prev_cmp_DE2_Default.map.qmsg
...........\..\DE2_Default.cmp.logdb
...........\..\DE2_Default.asm.qmsg
...........\..\DE2_Default.syn_hier_info
...........\..\prev_cmp_DE2_Default.fit.qmsg
...........\..\DE2_Default.sld_design_entry_dsc.sci
...........\..\DE2_Default.rtlv.hdb
...........\..\DE2_Default.eco.cdb
...........\..\DE2_Default.sgdiff.hdb
...........\..\prev_cmp_DE2_Default.asm.qmsg
...........\..\DE2_Default.map.logdb
...........\..\DE2_Default.tmw_info
...........\..\DE2_Default.rtlv_sg_swap.cdb
...........\..\DE2_Default.sgdiff.cdb
...........\..\DE2_Default.asm_labs.ddb
...........\..\DE2_Default.map.cdb
...........\..\DE2_Default.map.hdb
...........\..\DE2_Default.sld_design_entry.sci
...........\..\DE2_Default.cmp0.ddb
...........\..\DE2_Default.cmp.cdb
...........\..\DE2_Default.signalprobe.cdb
...........\..\DE2_Default.cmp.rdb
...........\..\DE2_Default.cmp.hdb
...........\..\DE2_Default.tis_db_list.ddb
...........\..\DE2_Default0.rtl.mif
...........\..\decode_1qa.tdf
...........\..\mux_akb.tdf
...........\..\mux_hkb.tdf
...........\..\rom0_AUDIO_DAC_1ed7bfc5.hdl.mif
...........\..\rom0_I2C_AV_Config_fe53227f.hdl.mif
...........\..\DE2_Default.db_info
...........\..\DE2_Default.cbx.xml
...........\..\DE2_Default.hif
...........\DE2_Default.asm.rpt
...........\codeclock.vhd.bak
...........\DE2_Default.qws
...........\VGA_Controller
...........\db
DE2_Default
...........\DE2_Default.v.bak
...........\DE2_Default.cdf
...........\DE2_Default.done
...........\DE2_Default.v
...........\DE2_Default.fit.smsg
...........\DE2_Default.fit.summary
...........\DE2_Default.map.rpt
...........\DE2_Default.flow.rpt
...........\DE2_Default.map.summary
...........\DE2_Default.pin
...........\DE2_Default.pof
...........\DE2_Default.qpf
...........\DE2_Default.qsf
...........\DE2_Default.fit.rpt
...........\DE2_Default.sof
...........\DE2_Default.tan.rpt
...........\DE2_Default.tan.summary
...........\codeclock.vhd
...........\DE2_Default_assignment_defaults.qdf
...........\I2C_AV_Config.v
...........\I2C_Controller.v
...........\Img_DATA.hex
...........\LCD_Controller.v
...........\LCD_TEST.v
...........\README.txt
...........\Reset_Delay.v
...........\SEG7_LUT.v
...........\SEG7_LUT_8.v
...........\VGA_Audio_PLL.v
...........\....Controller\Img_DATA.hex
...........\..............\Img_RAM.v
...........\..............\VGA_Controller.v
...........\..............\VGA_OSD_RAM.v
...........\..............\VGA_Param.h
...........\db\altsyncram_p132.tdf
...........\..\altsyncram_q7o1.tdf
...........\..\altsyncram_vpv.tdf
...........\..\DE2_Default.hier_info
...........\..\DE2_Default.pre_map.hdb
...........\..\DE2_Default.pre_map.cdb
...........\..\prev_cmp_DE2_Default.qmsg
...........\..\DE2_Default.rtlv_sg.cdb
...........\..\DE2_Default.smp_dump.txt
...........\..\DE2_Default.fit.qmsg
...........\..\DE2_Default.map.qmsg
...........\..\prev_cmp_DE2_Default.map.qmsg
...........\..\DE2_Default.cmp.logdb
...........\..\DE2_Default.asm.qmsg
...........\..\DE2_Default.syn_hier_info
...........\..\prev_cmp_DE2_Default.fit.qmsg
...........\..\DE2_Default.sld_design_entry_dsc.sci
...........\..\DE2_Default.rtlv.hdb
...........\..\DE2_Default.eco.cdb
...........\..\DE2_Default.sgdiff.hdb
...........\..\prev_cmp_DE2_Default.asm.qmsg
...........\..\DE2_Default.map.logdb
...........\..\DE2_Default.tmw_info
...........\..\DE2_Default.rtlv_sg_swap.cdb
...........\..\DE2_Default.sgdiff.cdb
...........\..\DE2_Default.asm_labs.ddb
...........\..\DE2_Default.map.cdb
...........\..\DE2_Default.map.hdb
...........\..\DE2_Default.sld_design_entry.sci
...........\..\DE2_Default.cmp0.ddb
...........\..\DE2_Default.cmp.cdb
...........\..\DE2_Default.signalprobe.cdb
...........\..\DE2_Default.cmp.rdb
...........\..\DE2_Default.cmp.hdb
...........\..\DE2_Default.tis_db_list.ddb
...........\..\DE2_Default0.rtl.mif
...........\..\decode_1qa.tdf
...........\..\mux_akb.tdf
...........\..\mux_hkb.tdf
...........\..\rom0_AUDIO_DAC_1ed7bfc5.hdl.mif
...........\..\rom0_I2C_AV_Config_fe53227f.hdl.mif
...........\..\DE2_Default.db_info
...........\..\DE2_Default.cbx.xml
...........\..\DE2_Default.hif
...........\DE2_Default.asm.rpt
...........\codeclock.vhd.bak
...........\DE2_Default.qws
...........\VGA_Controller
...........\db
DE2_Default