文件名称:uart16550
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Implementation of the UART 16550 model with verilog langugue
(系统自动生成,下载前可以参看下载内容)
下载文件列表
uart16550
.........\raminfr.v
.........\timescale.v
.........\uart_debug_if.v
.........\uart_defines.v
.........\uart_receiver.v
.........\uart_regs.v
.........\uart_rfifo.v
.........\uart_sync_flops.v
.........\uart_tfifo.v
.........\uart_top.v
.........\uart_transmitter.v
.........\uart_wb.v
.........\raminfr.v
.........\timescale.v
.........\uart_debug_if.v
.........\uart_defines.v
.........\uart_receiver.v
.........\uart_regs.v
.........\uart_rfifo.v
.........\uart_sync_flops.v
.........\uart_tfifo.v
.........\uart_top.v
.........\uart_transmitter.v
.........\uart_wb.v