文件名称:DDS
介绍说明－－下载内容均来自于网络，请自行研究使用
基于FPGA的DDS的相位累加器详细介绍,是VHDL编程,利用quartus2平台.-Design of Direct digital synthesis Signal Generator
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下载文件列表
gao\sin_rom.qip
...\sin_rom.vhd
...\sin_rom.vhd.bak
...\ADDER10B.bsf
...\ADDER10B.vhd
...\ADDER10B.vwf
...\ADDER16B.bsf
...\ADDER16B.vhd
...\ADDER16B.vwf
...\DDS_VHDL.vhd
...\DDS_VHDL.vhd.bak
...\gh.done
...\gh.dpf
...\gh.fit.smsg
...\gh.fit.summary
...\gh.map.summary
...\gh.pin
...\gh.pof
...\gh.qpf
...\gh.qsf
...\gh.sim.rpt
...\gh.sof
...\gh.tan.summary
...\license.txt
...\pp.bdf
...\readme.txt
...\REG10B.bsf
...\REG10B.vhd
...\REG10B.vwf
...\REG16B.bsf
...\REG16B.vhd
...\REG16B.vwf
...\rom_data.mif
...\sin_rom1.bsf
...\sin_rom1.cmp
...\sin_rom1.qip
...\sin_rom1.vhd
...\sin_rom.bsf
...\sin_rom.cmp
...\sin_rom1.vwf
...\SINGT.vhd
...\SINGT.vwf
...\lpm_rom0.vhd
...\lpm_rom0.cmp
...\lpm_rom0.bsf
...\lpm_rom0.qip
...\lpm_rom1.vhd
...\lpm_rom1.cmp
...\lpm_rom1.bsf
...\lpm_rom1.qip
...\DDS_VHDL.vwf
...\pp.vwf
...\gh.sim.cvwf
...\gh.asm.rpt
...\gh.flow.rpt
...\gh.tan.rpt
...\gh.qws
...\gh.map.rpt
...\gh.fit.rpt
...\incremental_db\README
...\..............\compiled_partitions\gh.root_partition.map.kpt
...\db\gh.db_info
...\..\gh.cmp.rdb
...\..\gh.eco.cdb
...\..\gh.eds_overflow
...\..\gh.sim.hdb
...\..\gh.sim.cvwf
...\..\prev_cmp_gh.sim.qmsg
...\..\gh.sim.rdb
...\..\prev_cmp_gh.qmsg
...\..\gh.cbx.xml
...\..\gh.hif
...\..\gh.hier_info
...\..\add_sub_4lh.tdf
...\..\gh.rtlv.hdb
...\..\gh.syn_hier_info
...\..\gh.sgdiff.cdb
...\..\gh.fit.qmsg
...\..\gh.sgdiff.hdb
...\..\altsyncram_4n41.tdf
...\..\gh.map.logdb
...\..\gh.asm.qmsg
...\..\gh.tan.qmsg
...\..\add_sub_alh.tdf
...\..\gh.map.cdb
...\..\gh.cmp.kpt
...\..\gh.cmp.logdb
...\..\gh.map.hdb
...\..\gh.sim.qmsg
...\..\gh.rtlv_sg.cdb
...\..\gh.sld_design_entry.sci
...\..\gh.cmp0.ddb
...\..\gh.map.qmsg
...\..\prev_cmp_gh.map.qmsg
...\..\prev_cmp_gh.fit.qmsg
...\..\gh.pre_map.hdb
...\..\prev_cmp_gh.asm.qmsg
...\..\gh.pre_map.cdb
...\..\gh.cmp.cdb
...\..\prev_cmp_gh.tan.qmsg
...\sin_rom.vhd
...\sin_rom.vhd.bak
...\ADDER10B.bsf
...\ADDER10B.vhd
...\ADDER10B.vwf
...\ADDER16B.bsf
...\ADDER16B.vhd
...\ADDER16B.vwf
...\DDS_VHDL.vhd
...\DDS_VHDL.vhd.bak
...\gh.done
...\gh.dpf
...\gh.fit.smsg
...\gh.fit.summary
...\gh.map.summary
...\gh.pin
...\gh.pof
...\gh.qpf
...\gh.qsf
...\gh.sim.rpt
...\gh.sof
...\gh.tan.summary
...\license.txt
...\pp.bdf
...\readme.txt
...\REG10B.bsf
...\REG10B.vhd
...\REG10B.vwf
...\REG16B.bsf
...\REG16B.vhd
...\REG16B.vwf
...\rom_data.mif
...\sin_rom1.bsf
...\sin_rom1.cmp
...\sin_rom1.qip
...\sin_rom1.vhd
...\sin_rom.bsf
...\sin_rom.cmp
...\sin_rom1.vwf
...\SINGT.vhd
...\SINGT.vwf
...\lpm_rom0.vhd
...\lpm_rom0.cmp
...\lpm_rom0.bsf
...\lpm_rom0.qip
...\lpm_rom1.vhd
...\lpm_rom1.cmp
...\lpm_rom1.bsf
...\lpm_rom1.qip
...\DDS_VHDL.vwf
...\pp.vwf
...\gh.sim.cvwf
...\gh.asm.rpt
...\gh.flow.rpt
...\gh.tan.rpt
...\gh.qws
...\gh.map.rpt
...\gh.fit.rpt
...\incremental_db\README
...\..............\compiled_partitions\gh.root_partition.map.kpt
...\db\gh.db_info
...\..\gh.cmp.rdb
...\..\gh.eco.cdb
...\..\gh.eds_overflow
...\..\gh.sim.hdb
...\..\gh.sim.cvwf
...\..\prev_cmp_gh.sim.qmsg
...\..\gh.sim.rdb
...\..\prev_cmp_gh.qmsg
...\..\gh.cbx.xml
...\..\gh.hif
...\..\gh.hier_info
...\..\add_sub_4lh.tdf
...\..\gh.rtlv.hdb
...\..\gh.syn_hier_info
...\..\gh.sgdiff.cdb
...\..\gh.fit.qmsg
...\..\gh.sgdiff.hdb
...\..\altsyncram_4n41.tdf
...\..\gh.map.logdb
...\..\gh.asm.qmsg
...\..\gh.tan.qmsg
...\..\add_sub_alh.tdf
...\..\gh.map.cdb
...\..\gh.cmp.kpt
...\..\gh.cmp.logdb
...\..\gh.map.hdb
...\..\gh.sim.qmsg
...\..\gh.rtlv_sg.cdb
...\..\gh.sld_design_entry.sci
...\..\gh.cmp0.ddb
...\..\gh.map.qmsg
...\..\prev_cmp_gh.map.qmsg
...\..\prev_cmp_gh.fit.qmsg
...\..\gh.pre_map.hdb
...\..\prev_cmp_gh.asm.qmsg
...\..\gh.pre_map.cdb
...\..\gh.cmp.cdb
...\..\prev_cmp_gh.tan.qmsg