文件名称:uart_core(V2_0)
- 所属分类:
- VHDL编程
- 资源属性:
- [Text]
- 上传时间:
- 2012-11-26
- 文件大小:
- 2.14mb
- 下载次数:
- 0次
- 提 供 者:
- xinli*****
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
本例为自己编好的VHDL的基于uart的FPGA的
设计。-In this case for their own good VHDL code uart of FPGA-based design.
设计。-In this case for their own good VHDL code uart of FPGA-based design.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
uart_core(V2_0)\baudrate_moudle.vhd
...............\cnt_ctrl.vhd
...............\count_moudle0.vhd
...............\count_moudle1.vhd
...............\count_moudle2.vhd
...............\ctrl_moudle.vhd
...............\ctrl_moudle.vhd.bak
...............\db\prev_cmp_uart_core.asm.qmsg
...............\..\prev_cmp_uart_core.eda.qmsg
...............\..\prev_cmp_uart_core.fit.qmsg
...............\..\prev_cmp_uart_core.map.qmsg
...............\..\prev_cmp_uart_core.qmsg
...............\..\prev_cmp_uart_core.tan.qmsg
...............\..\uart_core.asm.qmsg
...............\..\uart_core.cbx.xml
...............\..\uart_core.cmp.bpm
...............\..\uart_core.cmp.cdb
...............\..\uart_core.cmp.ecobp
...............\..\uart_core.cmp.hdb
...............\..\uart_core.cmp.logdb
...............\..\uart_core.cmp.rdb
...............\..\uart_core.cmp.tdb
...............\..\uart_core.cmp0.ddb
...............\..\uart_core.db_info
...............\..\uart_core.eco.cdb
...............\..\uart_core.eda.qmsg
...............\..\uart_core.fit.qmsg
...............\..\uart_core.hier_info
...............\..\uart_core.hif
...............\..\uart_core.map.bpm
...............\..\uart_core.map.cdb
...............\..\uart_core.map.ecobp
...............\..\uart_core.map.hdb
...............\..\uart_core.map.logdb
...............\..\uart_core.map.qmsg
...............\..\uart_core.map_bb.cdb
...............\..\uart_core.map_bb.hdb
...............\..\uart_core.map_bb.hdbx
...............\..\uart_core.map_bb.logdb
...............\..\uart_core.pre_map.cdb
...............\..\uart_core.pre_map.hdb
...............\..\uart_core.psp
...............\..\uart_core.root_partition.cmp.atm
...............\..\uart_core.root_partition.cmp.dfp
...............\..\uart_core.root_partition.cmp.hdbx
...............\..\uart_core.root_partition.cmp.logdb
...............\..\uart_core.root_partition.cmp.rcf
...............\..\uart_core.root_partition.map.atm
...............\..\uart_core.root_partition.map.hdbx
...............\..\uart_core.root_partition.map.info
...............\..\uart_core.rpp.qmsg
...............\..\uart_core.rtlv.hdb
...............\..\uart_core.rtlv_sg.cdb
...............\..\uart_core.rtlv_sg_swap.cdb
...............\..\uart_core.sgate.rvd
...............\..\uart_core.sgate_sm.rvd
...............\..\uart_core.sgdiff.cdb
...............\..\uart_core.sgdiff.hdb
...............\..\uart_core.signalprobe.cdb
...............\..\uart_core.sld_design_entry.sci
...............\..\uart_core.sld_design_entry_dsc.sci
...............\..\uart_core.smp_dump.txt
...............\..\uart_core.syn_hier_info
...............\..\uart_core.tan.qmsg
...............\..\uart_core.tis_db_list.ddb
...............\..\uart_core.tmw_info
...............\detect_moudle.vhd
...............\parity_moudle.vhd
...............\reg_moudle0.vhd
...............\reg_moudle1.vhd
...............\reg_moudle2.vhd
...............\select_moudle.vhd
...............\sel_data_moudle.vhd
...............\sel_out_moudle.vhd
...............\.imulation\modelsim\modelsim.ini
...............\..........\........\msim_transcript
...............\..........\........\rtl_work\baudrate_moudle\behave.dat
...............\..........\........\........\...............\_primary.dat
...............\..........\........\........\cnt_ctrl\behave.dat
...............\..........\........\........\........\_primary.dat
...............\..........\........\........\.ount_moudle0\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........\........\........\............1\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........\........\........\............2\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........\........\........\.trl_moudle\behave.dat
...............\..........\........\........\...........\_primary.dat
...............\..........\........\........\detect_moudle\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........
...............\cnt_ctrl.vhd
...............\count_moudle0.vhd
...............\count_moudle1.vhd
...............\count_moudle2.vhd
...............\ctrl_moudle.vhd
...............\ctrl_moudle.vhd.bak
...............\db\prev_cmp_uart_core.asm.qmsg
...............\..\prev_cmp_uart_core.eda.qmsg
...............\..\prev_cmp_uart_core.fit.qmsg
...............\..\prev_cmp_uart_core.map.qmsg
...............\..\prev_cmp_uart_core.qmsg
...............\..\prev_cmp_uart_core.tan.qmsg
...............\..\uart_core.asm.qmsg
...............\..\uart_core.cbx.xml
...............\..\uart_core.cmp.bpm
...............\..\uart_core.cmp.cdb
...............\..\uart_core.cmp.ecobp
...............\..\uart_core.cmp.hdb
...............\..\uart_core.cmp.logdb
...............\..\uart_core.cmp.rdb
...............\..\uart_core.cmp.tdb
...............\..\uart_core.cmp0.ddb
...............\..\uart_core.db_info
...............\..\uart_core.eco.cdb
...............\..\uart_core.eda.qmsg
...............\..\uart_core.fit.qmsg
...............\..\uart_core.hier_info
...............\..\uart_core.hif
...............\..\uart_core.map.bpm
...............\..\uart_core.map.cdb
...............\..\uart_core.map.ecobp
...............\..\uart_core.map.hdb
...............\..\uart_core.map.logdb
...............\..\uart_core.map.qmsg
...............\..\uart_core.map_bb.cdb
...............\..\uart_core.map_bb.hdb
...............\..\uart_core.map_bb.hdbx
...............\..\uart_core.map_bb.logdb
...............\..\uart_core.pre_map.cdb
...............\..\uart_core.pre_map.hdb
...............\..\uart_core.psp
...............\..\uart_core.root_partition.cmp.atm
...............\..\uart_core.root_partition.cmp.dfp
...............\..\uart_core.root_partition.cmp.hdbx
...............\..\uart_core.root_partition.cmp.logdb
...............\..\uart_core.root_partition.cmp.rcf
...............\..\uart_core.root_partition.map.atm
...............\..\uart_core.root_partition.map.hdbx
...............\..\uart_core.root_partition.map.info
...............\..\uart_core.rpp.qmsg
...............\..\uart_core.rtlv.hdb
...............\..\uart_core.rtlv_sg.cdb
...............\..\uart_core.rtlv_sg_swap.cdb
...............\..\uart_core.sgate.rvd
...............\..\uart_core.sgate_sm.rvd
...............\..\uart_core.sgdiff.cdb
...............\..\uart_core.sgdiff.hdb
...............\..\uart_core.signalprobe.cdb
...............\..\uart_core.sld_design_entry.sci
...............\..\uart_core.sld_design_entry_dsc.sci
...............\..\uart_core.smp_dump.txt
...............\..\uart_core.syn_hier_info
...............\..\uart_core.tan.qmsg
...............\..\uart_core.tis_db_list.ddb
...............\..\uart_core.tmw_info
...............\detect_moudle.vhd
...............\parity_moudle.vhd
...............\reg_moudle0.vhd
...............\reg_moudle1.vhd
...............\reg_moudle2.vhd
...............\select_moudle.vhd
...............\sel_data_moudle.vhd
...............\sel_out_moudle.vhd
...............\.imulation\modelsim\modelsim.ini
...............\..........\........\msim_transcript
...............\..........\........\rtl_work\baudrate_moudle\behave.dat
...............\..........\........\........\...............\_primary.dat
...............\..........\........\........\cnt_ctrl\behave.dat
...............\..........\........\........\........\_primary.dat
...............\..........\........\........\.ount_moudle0\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........\........\........\............1\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........\........\........\............2\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........\........\........\.trl_moudle\behave.dat
...............\..........\........\........\...........\_primary.dat
...............\..........\........\........\detect_moudle\behave.dat
...............\..........\........\........\.............\_primary.dat
...............\..........