文件名称:myled

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [MacOS] [C/C++] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 9.58mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 王**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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基于NIOSII的led驱动程序,包含FPGA的硬件设计部分和软件设计部分-Based NIOSII' s led driver, the hardware design part contains the FPGA and software design
(系统自动生成,下载前可以参看下载内容)

下载文件列表

myled\.metadata\.lock

.....\.........\.log

.....\.........\.plugins\com.altera.nj.ui\dialog_settings.xml

.....\.........\........\org.eclipse.cdt.core\.log

.....\.........\........\....................\hello_led.1271465722000.pdom

.....\.........\........\....................\hello_led_syslib.1271465721750.pdom

.....\.........\........\................make.core\.log

.....\.........\........\.........................\hello_led.sc

.....\.........\........\.........................\hello_led_syslib.sc

.....\.........\........\.........................\specs.c

.....\.........\........\.........................\specs.cpp

.....\.........\........\.....................ui\dialog_settings.xml

.....\.........\........\................ui\dialog_settings.xml

.....\.........\........\.............ore.resources\.history\52\80e3d3bc5d4f001f16c5b09bb9aa9a70

.....\.........\........\..........................\........\.b\00b0e0da0e4a001f1f87efca4cd95d18

.....\.........\........\..........................\........\6a\906cb7cc5d4f001f16c5b09bb9aa9a70

.....\.........\........\..........................\........\b3\60f8e9dd0e4a001f1f87efca4cd95d18

.....\.........\........\..........................\........\fc\302625e10e4a001f1f87efca4cd95d18

.....\.........\........\..........................\.projects\hello_led\.indexes\history.index

.....\.........\........\..........................\.........\.........\........\properties.index

.....\.........\........\..........................\.........\........._syslib\.indexes\properties.index

.....\.........\........\..........................\.root\.indexes\history.version

.....\.........\........\..........................\.....\........\properties.index

.....\.........\........\..........................\.....\........\properties.version

.....\.........\........\..........................\.....\6.tree

.....\.........\........\..........................\.safetable\org.eclipse.core.resources

.....\.........\........\..................untime\.settings\com.altera.ide.core.prefs

.....\.........\........\........................\.........\org.eclipse.cdt.debug.core.prefs

.....\.........\........\........................\.........\org.eclipse.cdt.debug.ui.prefs

.....\.........\........\........................\.........\org.eclipse.cdt.managedbuilder.core.prefs

.....\.........\........\........................\.........\org.eclipse.cdt.ui.prefs

.....\.........\........\........................\.........\org.eclipse.core.resources.prefs

.....\.........\........\........................\.........\org.eclipse.debug.ui.prefs

.....\.........\........\........................\.........\org.eclipse.ui.editors.prefs

.....\.........\........\........................\.........\org.eclipse.ui.ide.prefs

.....\.........\........\........................\.........\org.eclipse.ui.prefs

.....\.........\........\............debug.core\.launches\flash programmer.launch

.....\.........\........\......................\.........\hello_led Nios II HW configuration.launch

.....\.........\........\..................ui\dialog_settings.xml

.....\.........\........\....................\launchConfigurationHistory.xml

.....\.........\........\............ltk.ui.refactoring\dialog_settings.xml

.....\.........\........\............ui.ide\dialog_settings.xml

.....\.........\........\...............workbench\dialog_settings.xml

.....\.........\........\........................\workbench.xml

.....\.........\version.ini

.....\.sopc_builder\install.ptf

.....\.............\install2.ptf

.....\.............\preferences.xml

.....\cpu.ocp

.....\cpu.sdc

.....\cpu.vhd

.....\cpu_ic_tag_ram.mif

.....\cpu_jtag_debug_module_sysclk.vhd

.....\cpu_jtag_debug_module_tck.vhd

.....\cpu_jtag_debug_module_wrapper.vhd

.....\cpu_mult_cell.vhd

.....\cpu_ociram_default_contents.mif

.....\cpu_rf_ram_a.mif

.....\cpu_rf_ram_b.mif

.....\cpu_test_bench.vhd

.....\db\altsyncram_21g1.tdf

.....\..\altsyncram_3jb1.tdf

.....\..\altsyncram_3nf1.tdf

.....\..\altsyncram_4nf1.tdf

.....\..\altsyncram_e502.tdf

.....\..\altsyncram_lib1.tdf

.....\..\altsyncram_lo31.tdf

.....\..\a

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