文件名称:lunwen-EasyFPGA030juzheng

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 305kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • pudn****
  • 相关连接:
  • 下载说明:
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基于EasyFPGA030的矩阵键盘设计实现工程。-Based EasyFPGA030 Design and Implementation of a matrix keyboard works.
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下载文件列表

基于EasyFPGA030的矩阵键盘设计工程文件\key\component\work\key\key.cxf

.....................................\...\.........\....\...\key.ldb

.....................................\...\.........\....\...\key.sdb

.....................................\...\.........\....\...\key.v

.....................................\...\.........\....\...\testbench.v

.....................................\...\designer\impl1\clk.ide_des

.....................................\...\........\.....\clk.tcl

.....................................\...\........\.....\designer.log

.....................................\...\........\.....\display.ide_des

.....................................\...\........\.....\key.adb

.....................................\...\........\.....\....dtf\verify.log

.....................................\...\........\.....\key.ide_des

.....................................\...\........\.....\key.pdb

.....................................\...\........\.....\key.pdb.depends

.....................................\...\........\.....\key.tcl

.....................................\...\........\.....\key_check.ide_des

.....................................\...\........\.....\key_ctrl.ide_des

.....................................\...\........\.....\....fp\$$FlashPro_FPBBALTLPT1.L$$

.....................................\...\........\.....\......\key.log

.....................................\...\........\.....\......\key.pro

.....................................\...\........\.....\......\projectData\key.pdb

.....................................\...\hdl\CLK.v

.....................................\...\...\display.v

.....................................\...\...\key_check.v

.....................................\...\...\key_ctrl.v

.....................................\...\...\reset.v

.....................................\...\...\waveperl.log

.....................................\...\KEY.prj

.....................................\...\smartgen\key_work.ixf

.....................................\...\........\smartgen.aws

.....................................\...\.timulus\BtimErrors.log

.....................................\...\........\clk.dsk

.....................................\...\........\clk.hpj

.....................................\...\........\clk_tbench.bk

.....................................\...\........\clk_tbench.btim

.....................................\...\........\clk_tbench.v

.....................................\...\........\display.dsk

.....................................\...\........\display.hpj

.....................................\...\........\files_to_build.txt

.....................................\...\........\waveperl.log

.....................................\...\viewdraw\vf\project.lst

.....................................\...\........\viewdraw.ini

.....................................\...\designer\impl1\key_fp\projectData

.....................................\...\component\work\key

.....................................\...\designer\impl1\key.dtf

.....................................\...\........\.....\key_fp

.....................................\...\........\.....\simulation

.....................................\...\component\work

.....................................\...\designer\impl1

.....................................\...\viewdraw\sch

.....................................\...\........\sym

.....................................\...\........\vf

.....................................\...\........\wir

.....................................\...\component

.....................................\...\constraint

.....................................\...\coreconsole

.....................................\...\designer

.....................................\...\hdl

.....................................\...\phy_synthesis

.....................................\...\simulation

.....................................\...\smartgen

.....................................\...\stimulus

.....................................\...\synthesis

.....................................\...\viewdraw

.....................................\key

基于EasyFPGA030的矩阵键盘设

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