文件名称:verilogRS
介绍说明－－下载内容均来自于网络，请自行研究使用
该文件为基于fpga的RS（204.188）译码器的verilong源代码，使用的Quartus II的开发环境，已经通过编译，需要者可以自己下载在编译简历工程使用-The document is based on fpga' s RS (204.188) decoder verilong source code, use the Quartus II development environment, has been compiled by the need to download the compiler can resume their work using
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下载文件列表
| 文件名 | 大小 | 更新时间 |
|---|---|---|
| fpga_verilog_RS(204 | 188)doecder\BM_KES.v | |
| ...............................\CheinSearch.v | ||
| ...............................\ff_mul.v | ||
| ...............................\forney.v | ||
| ...............................\ROM_INV.mif | ||
| ...............................\rom_inv.v | ||
| ...............................\rom_power.mif | ||
| ...............................\rom_power.v | ||
| ...............................\RS(204 | 188)译码器说明.txt | |
| ...............................\rs_decoder.v | ||
| ...............................\SyndromeCalc.v | ||
| fpga_verilog_RS(204 | 188)doecder |