文件名称:digital_frequency

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 481kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 孙*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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用verilog实现数字频率计的设计,具有自动换挡功能,采用t法和m法设计,低频显示周期。量程为0.5~10Mhz。开发环境为quartus-This is a method of designing a digital frequency-measuring device. It can measure frequency ranging from 0.5Hz to 10MHz. It is developed in the program of Quartus.
相关搜索: frequency
measure

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下载文件列表

数字频率计\freq\10_divider.v

..........\....\10_divider.v.bak

..........\....\5_divider.v

..........\....\5_divider.v.bak

..........\....\clk_mux.bsf

..........\....\clk_mux.v

..........\....\clk_mux.v.bak

..........\....\clk_mux.vwf

..........\....\clk_select.bdf

..........\....\clk_select.bsf

..........\....\clk_select.vwf

..........\....\control.bsf

..........\....\control.v

..........\....\control.v.bak

..........\....\control.vwf

..........\....\counter-test.bsf

..........\....\counter.bdf

..........\....\counter.bsf

..........\....\counter.vwf

..........\....\counter10.v

..........\....\counter_10.bsf

..........\....\counter_10.v

..........\....\counter_10.v.bak

..........\....\counter_10.vwf

..........\....\data_mux.bsf

..........\....\data_mux.v

..........\....\data_mux.v.bak

..........\....\data_mux.vwf

..........\....\.b\add_sub_cnh.tdf

..........\....\..\add_sub_poh.tdf

..........\....\..\add_sub_qoh.tdf

..........\....\..\freq.asm.qmsg

..........\....\..\freq.cbx.xml

..........\....\..\freq.cmp.cdb

..........\....\..\freq.cmp.hdb

..........\....\..\freq.cmp.logdb

..........\....\..\freq.cmp.rdb

..........\....\..\freq.cmp.tdb

..........\....\..\freq.cmp0.ddb

..........\....\..\freq.db_info

..........\....\..\freq.eco.cdb

..........\....\..\freq.eds_overflow

..........\....\..\freq.fit.qmsg

..........\....\..\freq.hier_info

..........\....\..\freq.hif

..........\....\..\freq.map.cdb

..........\....\..\freq.map.hdb

..........\....\..\freq.map.logdb

..........\....\..\freq.map.qmsg

..........\....\..\freq.pre_map.cdb

..........\....\..\freq.pre_map.hdb

..........\....\..\freq.rtlv.hdb

..........\....\..\freq.rtlv_sg.cdb

..........\....\..\freq.rtlv_sg_swap.cdb

..........\....\..\freq.sgdiff.cdb

..........\....\..\freq.sgdiff.hdb

..........\....\..\freq.sim.cvwf

..........\....\..\freq.sim.hdb

..........\....\..\freq.sim.qmsg

..........\....\..\freq.sim.rdb

..........\....\..\freq.sld_design_entry.sci

..........\....\..\freq.sld_design_entry_dsc.sci

..........\....\..\freq.syn_hier_info

..........\....\..\freq.tan.qmsg

..........\....\..\freq.tis_db_list.ddb

..........\....\..\freq.tmw_info

..........\....\..\prev_cmp_freq.asm.qmsg

..........\....\..\prev_cmp_freq.fit.qmsg

..........\....\..\prev_cmp_freq.map.qmsg

..........\....\..\prev_cmp_freq.qmsg

..........\....\..\prev_cmp_freq.sim.qmsg

..........\....\..\prev_cmp_freq.tan.qmsg

..........\....\..\wed.wsf

..........\....\divider_10.bsf

..........\....\divider_10.v

..........\....\divider_10.v.bak

..........\....\divider_10.vwf

..........\....\divider_2.bsf

..........\....\divider_2.v

..........\....\divider_2.v.bak

..........\....\divider_2.vwf

..........\....\divider_5.v

..........\....\divider_5.vwf

..........\....\flip_latch.bsf

..........\....\flip_latch.v

..........\....\flip_latch.v.bak

..........\....\flip_latch.vwf

..........\....\flow.v

..........\....\freq.asm.rpt

..........\....\freq.done

..........\....\freq.dpf

..........\....\freq.fit.rpt

..........\....\freq.fit.summary

..........\....\freq.flow.rpt

..........\....\freq.map.rpt

..........\....\freq.map.smsg

..........\....\freq.map.summary

..........\....\freq.pin

..........\....\freq.pof

..........\....\freq.qpf

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