文件名称:DE2_70_TOP
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在quartus上实现电子锁的设计，采用cyclone的板子，方便设置初始密码，更新密码-Quartus to achieve in the design of electronic locks, using cyclone of the board, easy to set the initial password, update password
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下载文件列表
DE2_70_TOP\db\DE2_70_TOP.asm.qmsg
..........\..\DE2_70_TOP.asm_labs.ddb
..........\..\DE2_70_TOP.cbx.xml
..........\..\DE2_70_TOP.cmp.bpm
..........\..\DE2_70_TOP.cmp.cdb
..........\..\DE2_70_TOP.cmp.ecobp
..........\..\DE2_70_TOP.cmp.hdb
..........\..\DE2_70_TOP.cmp.logdb
..........\..\DE2_70_TOP.cmp.rdb
..........\..\DE2_70_TOP.cmp.tdb
..........\..\DE2_70_TOP.cmp0.ddb
..........\..\DE2_70_TOP.cmp_bb.cdb
..........\..\DE2_70_TOP.cmp_bb.hdb
..........\..\DE2_70_TOP.cmp_bb.logdb
..........\..\DE2_70_TOP.cmp_bb.rcf
..........\..\DE2_70_TOP.dbp
..........\..\DE2_70_TOP.db_info
..........\..\DE2_70_TOP.eco.cdb
..........\..\DE2_70_TOP.fit.qmsg
..........\..\DE2_70_TOP.hier_info
..........\..\DE2_70_TOP.hif
..........\..\DE2_70_TOP.map.bpm
..........\..\DE2_70_TOP.map.cdb
..........\..\DE2_70_TOP.map.ecobp
..........\..\DE2_70_TOP.map.hdb
..........\..\DE2_70_TOP.map.logdb
..........\..\DE2_70_TOP.map.qmsg
..........\..\DE2_70_TOP.map_bb.cdb
..........\..\DE2_70_TOP.map_bb.hdb
..........\..\DE2_70_TOP.map_bb.logdb
..........\..\DE2_70_TOP.pre_map.cdb
..........\..\DE2_70_TOP.pre_map.hdb
..........\..\DE2_70_TOP.psp
..........\..\DE2_70_TOP.pss
..........\..\DE2_70_TOP.rtlv.hdb
..........\..\DE2_70_TOP.rtlv_sg.cdb
..........\..\DE2_70_TOP.rtlv_sg_swap.cdb
..........\..\DE2_70_TOP.sgdiff.cdb
..........\..\DE2_70_TOP.sgdiff.hdb
..........\..\DE2_70_TOP.signalprobe.cdb
..........\..\DE2_70_TOP.sld_design_entry.sci
..........\..\DE2_70_TOP.sld_design_entry_dsc.sci
..........\..\DE2_70_TOP.syn_hier_info
..........\..\DE2_70_TOP.tan.qmsg
..........\..\DE2_70_TOP.tis_db_list.ddb
..........\..\prev_cmp_DE2_70_TOP.asm.qmsg
..........\..\prev_cmp_DE2_70_TOP.fit.qmsg
..........\..\prev_cmp_DE2_70_TOP.map.qmsg
..........\..\prev_cmp_DE2_70_TOP.qmsg
..........\..\prev_cmp_DE2_70_TOP.tan.qmsg
..........\DE2_70_TOP.asm.rpt
..........\DE2_70_TOP.done
..........\DE2_70_TOP.dpf
..........\DE2_70_TOP.fit.rpt
..........\DE2_70_TOP.fit.smsg
..........\DE2_70_TOP.fit.summary
..........\DE2_70_TOP.flow.rpt
..........\DE2_70_TOP.map.rpt
..........\DE2_70_TOP.map.smsg
..........\DE2_70_TOP.map.summary
..........\DE2_70_TOP.pin
..........\DE2_70_TOP.pof
..........\DE2_70_TOP.qpf
..........\DE2_70_TOP.qsf
..........\DE2_70_TOP.qws
..........\DE2_70_TOP.sof
..........\DE2_70_TOP.tan.rpt
..........\DE2_70_TOP.tan.summary
..........\DE2_70_TOP.v
..........\DE2_70_TOP.v.bak
..........\elock.v
..........\lock.v
..........\lock.v.bak
..........\Verilog1.v
..........\db
DE2_70_TOP
..........\..\DE2_70_TOP.asm_labs.ddb
..........\..\DE2_70_TOP.cbx.xml
..........\..\DE2_70_TOP.cmp.bpm
..........\..\DE2_70_TOP.cmp.cdb
..........\..\DE2_70_TOP.cmp.ecobp
..........\..\DE2_70_TOP.cmp.hdb
..........\..\DE2_70_TOP.cmp.logdb
..........\..\DE2_70_TOP.cmp.rdb
..........\..\DE2_70_TOP.cmp.tdb
..........\..\DE2_70_TOP.cmp0.ddb
..........\..\DE2_70_TOP.cmp_bb.cdb
..........\..\DE2_70_TOP.cmp_bb.hdb
..........\..\DE2_70_TOP.cmp_bb.logdb
..........\..\DE2_70_TOP.cmp_bb.rcf
..........\..\DE2_70_TOP.dbp
..........\..\DE2_70_TOP.db_info
..........\..\DE2_70_TOP.eco.cdb
..........\..\DE2_70_TOP.fit.qmsg
..........\..\DE2_70_TOP.hier_info
..........\..\DE2_70_TOP.hif
..........\..\DE2_70_TOP.map.bpm
..........\..\DE2_70_TOP.map.cdb
..........\..\DE2_70_TOP.map.ecobp
..........\..\DE2_70_TOP.map.hdb
..........\..\DE2_70_TOP.map.logdb
..........\..\DE2_70_TOP.map.qmsg
..........\..\DE2_70_TOP.map_bb.cdb
..........\..\DE2_70_TOP.map_bb.hdb
..........\..\DE2_70_TOP.map_bb.logdb
..........\..\DE2_70_TOP.pre_map.cdb
..........\..\DE2_70_TOP.pre_map.hdb
..........\..\DE2_70_TOP.psp
..........\..\DE2_70_TOP.pss
..........\..\DE2_70_TOP.rtlv.hdb
..........\..\DE2_70_TOP.rtlv_sg.cdb
..........\..\DE2_70_TOP.rtlv_sg_swap.cdb
..........\..\DE2_70_TOP.sgdiff.cdb
..........\..\DE2_70_TOP.sgdiff.hdb
..........\..\DE2_70_TOP.signalprobe.cdb
..........\..\DE2_70_TOP.sld_design_entry.sci
..........\..\DE2_70_TOP.sld_design_entry_dsc.sci
..........\..\DE2_70_TOP.syn_hier_info
..........\..\DE2_70_TOP.tan.qmsg
..........\..\DE2_70_TOP.tis_db_list.ddb
..........\..\prev_cmp_DE2_70_TOP.asm.qmsg
..........\..\prev_cmp_DE2_70_TOP.fit.qmsg
..........\..\prev_cmp_DE2_70_TOP.map.qmsg
..........\..\prev_cmp_DE2_70_TOP.qmsg
..........\..\prev_cmp_DE2_70_TOP.tan.qmsg
..........\DE2_70_TOP.asm.rpt
..........\DE2_70_TOP.done
..........\DE2_70_TOP.dpf
..........\DE2_70_TOP.fit.rpt
..........\DE2_70_TOP.fit.smsg
..........\DE2_70_TOP.fit.summary
..........\DE2_70_TOP.flow.rpt
..........\DE2_70_TOP.map.rpt
..........\DE2_70_TOP.map.smsg
..........\DE2_70_TOP.map.summary
..........\DE2_70_TOP.pin
..........\DE2_70_TOP.pof
..........\DE2_70_TOP.qpf
..........\DE2_70_TOP.qsf
..........\DE2_70_TOP.qws
..........\DE2_70_TOP.sof
..........\DE2_70_TOP.tan.rpt
..........\DE2_70_TOP.tan.summary
..........\DE2_70_TOP.v
..........\DE2_70_TOP.v.bak
..........\elock.v
..........\lock.v
..........\lock.v.bak
..........\Verilog1.v
..........\db
DE2_70_TOP