文件名称:cjq_firmware_combine
介绍说明－－下载内容均来自于网络，请自行研究使用
这是一个通过cpld扩张两个串口和两个并口的VHDL程序，非常适用于初学者扩张串口和并口用。-This is an expansion by cpld two serial and two parallel port of the VHDL program is ideal for beginners to use serial and parallel port expansion.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
cjq_firmware_combine
....................\Chain1.cdf
....................\cjq_firmware.asm.rpt
....................\cjq_firmware.cdf
....................\cjq_firmware.done
....................\cjq_firmware.dpf
....................\cjq_firmware.fit.rpt
....................\cjq_firmware.fit.summary
....................\cjq_firmware.flow.rpt
....................\cjq_firmware.map.rpt
....................\cjq_firmware.map.smsg
....................\cjq_firmware.map.summary
....................\cjq_firmware.pin
....................\cjq_firmware.pof
....................\cjq_firmware.qpf
....................\cjq_firmware.qsf
....................\cjq_firmware.qsf.bak
....................\cjq_firmware.qws
....................\cjq_firmware.sim.rpt
....................\cjq_firmware.tan.rpt
....................\cjq_firmware.tan.summary
....................\cjq_firmware.v
....................\cjq_firmware.vwf
....................\cjq_firmware_assignment_defaults.qdf
....................\db
....................\..\cjq_firmware.db_info
....................\..\cjq_firmware.eco.cdb
....................\..\cjq_firmware.sld_design_entry.sci
....................\..\wed.zsf
....................\IEEE1284H_S.qsf
....................\par_host_top.v
....................\par_slave_top.v
....................\quartus_nativelink_synthesis.log
....................\ser_top.v
....................\ser_top.v.bak
....................\synplify_work
....................\.............\cjq_firmware.sdc
....................\.............\cjq_firmware_alt.tcl
....................\.............\stdout.log
....................\test_module.v
....................\Chain1.cdf
....................\cjq_firmware.asm.rpt
....................\cjq_firmware.cdf
....................\cjq_firmware.done
....................\cjq_firmware.dpf
....................\cjq_firmware.fit.rpt
....................\cjq_firmware.fit.summary
....................\cjq_firmware.flow.rpt
....................\cjq_firmware.map.rpt
....................\cjq_firmware.map.smsg
....................\cjq_firmware.map.summary
....................\cjq_firmware.pin
....................\cjq_firmware.pof
....................\cjq_firmware.qpf
....................\cjq_firmware.qsf
....................\cjq_firmware.qsf.bak
....................\cjq_firmware.qws
....................\cjq_firmware.sim.rpt
....................\cjq_firmware.tan.rpt
....................\cjq_firmware.tan.summary
....................\cjq_firmware.v
....................\cjq_firmware.vwf
....................\cjq_firmware_assignment_defaults.qdf
....................\db
....................\..\cjq_firmware.db_info
....................\..\cjq_firmware.eco.cdb
....................\..\cjq_firmware.sld_design_entry.sci
....................\..\wed.zsf
....................\IEEE1284H_S.qsf
....................\par_host_top.v
....................\par_slave_top.v
....................\quartus_nativelink_synthesis.log
....................\ser_top.v
....................\ser_top.v.bak
....................\synplify_work
....................\.............\cjq_firmware.sdc
....................\.............\cjq_firmware_alt.tcl
....................\.............\stdout.log
....................\test_module.v