文件名称:verilogiic1121
介绍说明－－下载内容均来自于网络，请自行研究使用
代码中分了两个模块，iic_com模块除了执行和IIC通信有关的代码设计外，还有案件检测部分；而led_seg7模块只是驱动数码管显示从EEPROM指定地址读出的数据。-Code carved the two modules, iic_com IIC communication module in addition to the implementation and design of the code, there are some cases of detection and led_seg7 module is driven digital display read out the specified address from the EEPROM data.
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下载文件列表
verilogiic1121\db\add_sub_klh.tdf
..............\..\iic_top.cbx.xml
..............\..\iic_top.cmp.rdb
..............\..\iic_top.db_info
..............\..\iic_top.eco.cdb
..............\..\iic_top.eds_overflow
..............\..\iic_top.fnsim.cdb
..............\..\iic_top.fnsim.hdb
..............\..\iic_top.fnsim.qmsg
..............\..\iic_top.hier_info
..............\..\iic_top.hif
..............\..\iic_top.lpc.html
..............\..\iic_top.lpc.rdb
..............\..\iic_top.lpc.txt
..............\..\iic_top.map.cdb
..............\..\iic_top.map.hdb
..............\..\iic_top.map.logdb
..............\..\iic_top.map.qmsg
..............\..\iic_top.pre_map.cdb
..............\..\iic_top.pre_map.hdb
..............\..\iic_top.rtlv.hdb
..............\..\iic_top.rtlv_sg.cdb
..............\..\iic_top.rtlv_sg_swap.cdb
..............\..\iic_top.sgdiff.cdb
..............\..\iic_top.sgdiff.hdb
..............\..\iic_top.sim.cvwf
..............\..\iic_top.sim.hdb
..............\..\iic_top.sim.qmsg
..............\..\iic_top.sim.rdb
..............\..\iic_top.simfam
..............\..\iic_top.sim_ori.vwf
..............\..\iic_top.sld_design_entry.sci
..............\..\iic_top.sld_design_entry_dsc.sci
..............\..\iic_top.syn_hier_info
..............\..\iic_top.tis_db_list.ddb
..............\..\iic_top.tmw_info
..............\..\prev_cmp_iic_top.map.qmsg
..............\..\prev_cmp_iic_top.qmsg
..............\..\prev_cmp_iic_top.sim.qmsg
..............\..\wed.wsf
..............\fenpin.v
..............\fenpin.v.bak
..............\fenpin.vwf
..............\iic_com.v
..............\iic_com.v.bak
..............\iic_top.asm.rpt
..............\iic_top.cdf
..............\iic_top.done
..............\iic_top.dpf
..............\iic_top.fit.rpt
..............\iic_top.fit.smsg
..............\iic_top.fit.summary
..............\iic_top.flow.rpt
..............\iic_top.map.rpt
..............\iic_top.map.summary
..............\iic_top.pin
..............\iic_top.pof
..............\iic_top.qpf
..............\iic_top.qsf
..............\iic_top.qws
..............\iic_top.sim.rpt
..............\iic_top.tan.rpt
..............\iic_top.tan.summary
..............\iic_top.v
..............\iic_top_assignment_defaults.qdf
..............\iic_top_description.txt
..............\.ncremental_db\compiled_partitions\iic_top.root_partition.map.kpt
..............\..............\README
..............\led_seg7.v
..............\tb_iic_top.vwf
..............\incremental_db\compiled_partitions
..............\db
..............\incremental_db
verilogiic1121
..............\..\iic_top.cbx.xml
..............\..\iic_top.cmp.rdb
..............\..\iic_top.db_info
..............\..\iic_top.eco.cdb
..............\..\iic_top.eds_overflow
..............\..\iic_top.fnsim.cdb
..............\..\iic_top.fnsim.hdb
..............\..\iic_top.fnsim.qmsg
..............\..\iic_top.hier_info
..............\..\iic_top.hif
..............\..\iic_top.lpc.html
..............\..\iic_top.lpc.rdb
..............\..\iic_top.lpc.txt
..............\..\iic_top.map.cdb
..............\..\iic_top.map.hdb
..............\..\iic_top.map.logdb
..............\..\iic_top.map.qmsg
..............\..\iic_top.pre_map.cdb
..............\..\iic_top.pre_map.hdb
..............\..\iic_top.rtlv.hdb
..............\..\iic_top.rtlv_sg.cdb
..............\..\iic_top.rtlv_sg_swap.cdb
..............\..\iic_top.sgdiff.cdb
..............\..\iic_top.sgdiff.hdb
..............\..\iic_top.sim.cvwf
..............\..\iic_top.sim.hdb
..............\..\iic_top.sim.qmsg
..............\..\iic_top.sim.rdb
..............\..\iic_top.simfam
..............\..\iic_top.sim_ori.vwf
..............\..\iic_top.sld_design_entry.sci
..............\..\iic_top.sld_design_entry_dsc.sci
..............\..\iic_top.syn_hier_info
..............\..\iic_top.tis_db_list.ddb
..............\..\iic_top.tmw_info
..............\..\prev_cmp_iic_top.map.qmsg
..............\..\prev_cmp_iic_top.qmsg
..............\..\prev_cmp_iic_top.sim.qmsg
..............\..\wed.wsf
..............\fenpin.v
..............\fenpin.v.bak
..............\fenpin.vwf
..............\iic_com.v
..............\iic_com.v.bak
..............\iic_top.asm.rpt
..............\iic_top.cdf
..............\iic_top.done
..............\iic_top.dpf
..............\iic_top.fit.rpt
..............\iic_top.fit.smsg
..............\iic_top.fit.summary
..............\iic_top.flow.rpt
..............\iic_top.map.rpt
..............\iic_top.map.summary
..............\iic_top.pin
..............\iic_top.pof
..............\iic_top.qpf
..............\iic_top.qsf
..............\iic_top.qws
..............\iic_top.sim.rpt
..............\iic_top.tan.rpt
..............\iic_top.tan.summary
..............\iic_top.v
..............\iic_top_assignment_defaults.qdf
..............\iic_top_description.txt
..............\.ncremental_db\compiled_partitions\iic_top.root_partition.map.kpt
..............\..............\README
..............\led_seg7.v
..............\tb_iic_top.vwf
..............\incremental_db\compiled_partitions
..............\db
..............\incremental_db
verilogiic1121