文件名称:IDE_FPGA

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 501kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • wan***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

用FPGA实现IDE控制器功能,带代码和仿真文件-IDE controller functions with the FPGA implementation, with code and simulation files
(系统自动生成,下载前可以参看下载内容)

下载文件列表

ata

...\bench

...\.....\CVS

...\.....\...\Entries

...\.....\...\Repository

...\.....\...\Root

...\.....\verilog

...\.....\.......\ata_device.v

...\.....\.......\CVS

...\.....\.......\...\Entries

...\.....\.......\...\Repository

...\.....\.......\...\Root

...\.....\.......\tests.v

...\.....\.......\test_bench_top.v

...\.....\.......\wb_mast_model.v

...\.....\.......\wb_model_defines.v

...\.....\.......\wb_slv_model.v

...\.....\vhdl

...\.....\....\CVS

...\.....\....\...\Entries

...\.....\....\...\Repository

...\.....\....\...\Root

...\CVS

...\...\Entries

...\...\Repository

...\...\Root

...\doc

...\...\CVS

...\...\...\Entries

...\...\...\Repository

...\...\...\Root

...\...\preliminary_ata_core.pdf

...\...\src

...\...\...\ata_core.doc

...\...\...\CVS

...\...\...\...\Entries

...\...\...\...\Repository

...\...\...\...\Root

...\documentation

...\.............\CVS

...\.............\...\Entries

...\.............\...\Repository

...\.............\...\Root

...\rtl

...\...\CVS

...\...\...\Entries

...\...\...\Repository

...\...\...\Root

...\...\verilog

...\...\.......\CVS

...\...\.......\...\Entries

...\...\.......\...\Repository

...\...\.......\...\Root

...\...\.......\ocidec-1

...\...\.......\........\atahost_controller.v

...\...\.......\........\atahost_pio_tctrl.v

...\...\.......\........\atahost_top.v

...\...\.......\........\atahost_wb_slave.v

...\...\.......\........\CVS

...\...\.......\........\...\Entries

...\...\.......\........\...\Repository

...\...\.......\........\...\Root

...\...\.......\........\revision_history.txt

...\...\.......\........\ro_cnt.v

...\...\.......\........\timescale.v

...\...\.......\........\ud_cnt.v

...\...\.......\ocidec-2

...\...\.......\........\atahost_controller.v

...\...\.......\........\atahost_pio_actrl.v

...\...\.......\........\atahost_pio_tctrl.v

...\...\.......\........\atahost_top.v

...\...\.......\........\atahost_wb_slave.v

...\...\.......\........\CVS

...\...\.......\........\...\Entries

...\...\.......\........\...\Repository

...\...\.......\........\...\Root

...\...\.......\........\revision_history.txt

...\...\.......\........\ro_cnt.v

...\...\.......\........\timescale.v

...\...\.......\........\ud_cnt.v

...\...\vhdl

...\...\....\CVS

...\...\....\...\Entries

...\...\....\...\Repository

...\...\....\...\Root

...\...\....\ocidec1

...\...\....\.......\atahost_controller.vhd

...\...\....\.......\atahost_pio_tctrl.vhd

...\...\....\.......\atahost_top.vhd

...\...\....\.......\atahost_wb_slave.vhd

...\...\....\.......\CVS

...\...\....\.......\...\Entries

...\...\....\.......\...\Repository

...\...\....\.......\...\Root

...\...\....\.......\revision_history.txt

...\...\....\.......\ro_cnt.vhd

...\...\....\.......\ud_cnt.vhd

...\...\....\ocidec2

...\...\....\.......\atahost_controller.vhd

...\...\....\.......\atahost_pio_actrl.vhd

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