文件名称:DDS_Verilogcode
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这是一个数字频率综合器（DDS）的Verilog实现源码，采用Quatoues软件综合和仿真-That this is a digital frequency synthesizer (DDS) of the Verilog implementation source code, synthesis and simulation software with Quatoues
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下载文件列表
DDS完整代码及仿真波形\DDS\computer.v
.....................\...\computer.v.bak
.....................\...\DDS.cr.mti
.....................\...\DDS.mpf
.....................\...\ROM.v
.....................\...\ROM.v.bak
.....................\...\rom_data.dat
.....................\...\Thumbs.db
.....................\...\top.v
.....................\...\top.v.bak
.....................\...\vsim.wlf
.....................\...\wave.do
.....................\...\.ork\@r@o@m\verilog.asm
.....................\...\....\......\_primary.dat
.....................\...\....\......\_primary.vhd
.....................\...\....\computer\verilog.asm
.....................\...\....\........\_primary.dat
.....................\...\....\........\_primary.vhd
.....................\...\....\top\verilog.asm
.....................\...\....\...\_primary.dat
.....................\...\....\...\_primary.vhd
.....................\...\....\_info
.....................\...\....\.opt\work_@r@o@m_fast.dt2
.....................\...\....\....\work_computer_fast.dt2
.....................\...\....\....\work_top_fast.asm
.....................\...\....\....\work_top_fast.dt2
.....................\...\....\....\work__info
.....................\...\....\....\_deps
.....................\...\wr_dat
.....................\...\wr_dat.dat
.....................\...\无标题.jpg
.....................\Thumbs.db
.....................\DDS\work\@r@o@m
.....................\...\....\computer
.....................\...\....\top
.....................\...\....\_opt
.....................\...\....\_temp
.....................\...\work
.....................\DDS
DDS完整代码及仿真波形
.....................\...\computer.v.bak
.....................\...\DDS.cr.mti
.....................\...\DDS.mpf
.....................\...\ROM.v
.....................\...\ROM.v.bak
.....................\...\rom_data.dat
.....................\...\Thumbs.db
.....................\...\top.v
.....................\...\top.v.bak
.....................\...\vsim.wlf
.....................\...\wave.do
.....................\...\.ork\@r@o@m\verilog.asm
.....................\...\....\......\_primary.dat
.....................\...\....\......\_primary.vhd
.....................\...\....\computer\verilog.asm
.....................\...\....\........\_primary.dat
.....................\...\....\........\_primary.vhd
.....................\...\....\top\verilog.asm
.....................\...\....\...\_primary.dat
.....................\...\....\...\_primary.vhd
.....................\...\....\_info
.....................\...\....\.opt\work_@r@o@m_fast.dt2
.....................\...\....\....\work_computer_fast.dt2
.....................\...\....\....\work_top_fast.asm
.....................\...\....\....\work_top_fast.dt2
.....................\...\....\....\work__info
.....................\...\....\....\_deps
.....................\...\wr_dat
.....................\...\wr_dat.dat
.....................\...\无标题.jpg
.....................\Thumbs.db
.....................\DDS\work\@r@o@m
.....................\...\....\computer
.....................\...\....\top
.....................\...\....\_opt
.....................\...\....\_temp
.....................\...\work
.....................\DDS
DDS完整代码及仿真波形