文件名称:RTC

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.13mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • zhang*****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

介绍说明--下载内容均来自于网络,请自行研究使用

actel fpga开发板fusion startkit实验例程,包含完整工程文件几verilog HDL 源码-actel fpga development board fusion startkit test routines, including the complete works of several verilog HDL source file
相关搜索: FPGA
RTC
actel
actel
hdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

RTC实验\Project\RTC_Test\assert.log

.......\.......\........\constraint\RTC_Test_Top_sdc.sdc

.......\.......\........\designer\impl1\designer.log

.......\.......\........\........\.....\designer_genhdl.log

.......\.......\........\........\.....\designer_gen_ba.log

.......\.......\........\........\.....\RTC_Test_Top.adb

.......\.......\........\........\.....\.............dtf\verify.log

.......\.......\........\........\.....\RTC_Test_Top.ide_des

.......\.......\........\........\.....\RTC_Test_Top.pdb

.......\.......\........\........\.....\RTC_Test_Top.pdb.depends

.......\.......\........\........\.....\RTC_Test_Top.tcl

.......\.......\........\........\.....\RTC_Test_Top_ba.sdf

.......\.......\........\........\.....\RTC_Test_Top_ba.v

.......\.......\........\........\.....\.............fp\$$FlashPro_FPBBALTLPT1.L$$

.......\.......\........\........\.....\...............\projectData\RTC_Test_Top.pdb

.......\.......\........\........\.....\...............\RTC_Test_Top.log

.......\.......\........\........\.....\...............\RTC_Test_Top.pro

.......\.......\........\........\新建文件夹\RTC_Test_Top.pdb

.......\.......\........\........\..........\说明.txt

.......\.......\........\........\.......... (2)\RTC_Test_Top.pdb

.......\.......\........\........\..............\说明.txt

.......\.......\........\........\............3)\RTC_Test_Top.pdb

.......\.......\........\........\..............\说明.txt

.......\.......\........\........\............4)\RTC_Test_Top.pdb

.......\.......\........\........\..............\说明.txt

.......\.......\........\hdl\hdlsynchk.tcl

.......\.......\........\...\RTC_Test_Top.v

.......\.......\........\RTC_Test.prj

.......\.......\........\simulation\Analog_RTC_acm_ram_R0C0.mem

.......\.......\........\..........\Analog_RTC_acm_rtc_ram_R0C0.mem

.......\.......\........\..........\Analog_RTC_assc_ram_R0C0.mem

.......\.......\........\..........\Analog_RTC_smev_ram_R0C0.mem

.......\.......\........\..........\Analog_RTC_smtr_ram_R0C0.mem

.......\.......\........\..........\FlashMem_RTC.mem

.......\.......\........\..........\meminit.dat

.......\.......\........\..........\modelsim.ini

.......\.......\........\..........\modelsim.ini.sav

.......\.......\........\.martgen\Analog_RTC\Analog_RTC.cfg

.......\.......\........\........\..........\Analog_RTC.cxf

.......\.......\........\........\..........\Analog_RTC.gen

.......\.......\........\........\..........\Analog_RTC.log

.......\.......\........\........\..........\Analog_RTC.ncf

.......\.......\........\........\..........\Analog_RTC.v

.......\.......\........\........\..........\Analog_RTC_acm.mem

.......\.......\........\........\..........\Analog_RTC_acm_ram.hex

.......\.......\........\........\..........\Analog_RTC_acm_ram_R0C0.mem

.......\.......\........\........\..........\Analog_RTC_acm_rtc.mem

.......\.......\........\........\..........\Analog_RTC_acm_rtc_ram.hex

.......\.......\........\........\..........\Analog_RTC_acm_rtc_ram_R0C0.mem

.......\.......\........\........\..........\Analog_RTC_assc.mem

.......\.......\........\........\..........\Analog_RTC_assc_ram.hex

.......\.......\........\........\..........\Analog_RTC_assc_ram.v

.......\.......\........\........\..........\Analog_RTC_assc_ram_R0C0.mem

.......\.......\........\........\..........\Analog_RTC_assc_wrapper.v

.......\.......\........\........\..........\Analog_RTC_smev.mem

.......\.......\........\........\..........\Analog_RTC_smev_ram.hex

.......\.......\........\........\..........\Analog_RTC_smev_ram.v

.......\.......\........\........\..........\Analog_RTC_smev_ram_R0C0.mem

.......\.......\........\........\..........\Analog_RTC_smev_wrapper.v

.......\.......\........\........\..........\Analog_RTC_smtr.mem

.......\.......\........\........\..........\Analog_RTC_smtr_ram.hex

.......\.......\........\........\..........\Analog_RTC_smtr_ram.v

.......\.......\........\........\..........\Analog_RTC_smtr_ram_R0C0.mem

.......\.......\........\........\..........\Analog_RTC_smtr_wrapper.v

.......\.......\........\........\Analog_RTC_work.ixf

.......\.......\..

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