文件名称:Altera-FPGACPLD
介绍说明－－下载内容均来自于网络，请自行研究使用
Altera FPGACPLD设计(基础篇)配套光盘,提供了书中所有示例的完整工程文件、设计源文件和说明文件。
每个工程示例都包括了该工程的项目文件、源文件、报告文件和生成结果等文件，读者可以用Quartus II或相应的软件直接打开。设计源文件根据设计输入类型分为源代码或原理图等。-Altera FPGACPLD Design (fundamental) supporting CD-ROM, the book provides a complete project files for all examples, the design source files and documentation. Each project includes examples of the project file, source documents, reports and other documents file and generate the results, the reader can use Quartus II or directly open the appropriate software. Design source file type according to the design input into the source code or schematic diagram, etc.
每个工程示例都包括了该工程的项目文件、源文件、报告文件和生成结果等文件，读者可以用Quartus II或相应的软件直接打开。设计源文件根据设计输入类型分为源代码或原理图等。-Altera FPGACPLD Design (fundamental) supporting CD-ROM, the book provides a complete project files for all examples, the design source files and documentation. Each project includes examples of the project file, source documents, reports and other documents file and generate the results, the reader can use Quartus II or directly open the appropriate software. Design source file type according to the design input into the source code or schematic diagram, etc.
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下载文件列表
Altera FPGACPLD设计(基础篇)\Altera设计文档\器件手册\CycloneII_器件手册.pdf
...........................\..............\........\Cyclone_器件手册.pdf
...........................\..............\........\HardCopy_系列手册.pdf
...........................\..............\........\MAXII_器件手册.pdf
...........................\..............\........\StratixGX_器件手册.pdf
...........................\..............\........\StratixII_器件手册.pdf
...........................\..............\........\Stratix_器件手册.pdf
...........................\..............\处理器手册\NiosII处理器参考手册.pdf
...........................\..............\..........\NiosII软件开发者手册.pdf
...........................\..............\工具手册\DSPBuilder_参考手册.pdf
...........................\..............\........\QuartusII_使用手册.pdf
...........................\..............\........\QuartusII简介.pdf
...........................\..............\........\QuartusII简介（中文版）.pdf
...........................\..............\配置手册\下载_编程_配置手册.pdf
...........................\Example-b3-1\uart_regs\core\myfifo_10.v
...........................\............\.........\....\myfifo_10_bb.v
...........................\............\.........\....\myfifo_10_wave0.jpg
...........................\............\.........\....\myfifo_10_waveforms.html
...........................\............\.........\....\myfifo_8.v
...........................\............\.........\....\myfifo_8_bb.v
...........................\............\.........\....\myfifo_8_wave0.jpg
...........................\............\.........\....\myfifo_8_waveforms.html
...........................\............\.........\dev\chip_editor.acv
...........................\............\.........\...\cmp_state.ini
...........................\............\.........\...\db\add_sub_1jh.tdf
...........................\............\.........\...\..\add_sub_dhh.tdf
...........................\............\.........\...\..\add_sub_ehh.tdf
...........................\............\.........\...\..\add_sub_fhh.tdf
...........................\............\.........\...\..\add_sub_ihh.tdf
...........................\............\.........\...\..\add_sub_rih.tdf
...........................\............\.........\...\..\altsyncram_apb1.tdf
...........................\............\.........\...\..\altsyncram_mmb1.tdf
...........................\............\.........\...\..\a_dpfifo_4nl.tdf
...........................\............\.........\...\..\a_dpfifo_rll.tdf
...........................\............\.........\...\..\a_fefifo_qve.tdf
...........................\............\.........\...\..\dpram_81k.tdf
...........................\............\.........\...\..\dpram_h2k.tdf
...........................\............\.........\...\..\scfifo_eaq.tdf
...........................\............\.........\...\..\scfifo_nbq.tdf
...........................\............\.........\...\..\uart_regs-sim.vwf
...........................\............\.........\...\..\uart_regs.asm.qmsg
...........................\............\.........\...\..\uart_regs.cmp.cdb
...........................\............\.........\...\..\uart_regs.cmp.hdb
...........................\............\.........\...\..\uart_regs.cmp.rdb
...........................\............\.........\...\..\uart_regs.csf.qmsg
...........................\............\.........\...\..\uart_regs.db_info
...........................\............\.........\...\..\uart_regs.fit.qmsg
...........................\............\.........\...\..\uart_regs.fld
...........................\............\.........\...\..\uart_regs.fnsim.cdb
...........................\............\.........\...\..\uart_regs.fnsim.hdb
...........................\............\.........\...\..\uart_regs.hif
...........................\............\.........\...\..\uart_regs.icc
...........................\............\.........\...\..\uart_regs.map.cdb
...........................\............\.........\...\..\uart_regs.map.hdb
...........................\............\.........\...\..\uart_regs.
...........................\..............\........\Cyclone_器件手册.pdf
...........................\..............\........\HardCopy_系列手册.pdf
...........................\..............\........\MAXII_器件手册.pdf
...........................\..............\........\StratixGX_器件手册.pdf
...........................\..............\........\StratixII_器件手册.pdf
...........................\..............\........\Stratix_器件手册.pdf
...........................\..............\处理器手册\NiosII处理器参考手册.pdf
...........................\..............\..........\NiosII软件开发者手册.pdf
...........................\..............\工具手册\DSPBuilder_参考手册.pdf
...........................\..............\........\QuartusII_使用手册.pdf
...........................\..............\........\QuartusII简介.pdf
...........................\..............\........\QuartusII简介（中文版）.pdf
...........................\..............\配置手册\下载_编程_配置手册.pdf
...........................\Example-b3-1\uart_regs\core\myfifo_10.v
...........................\............\.........\....\myfifo_10_bb.v
...........................\............\.........\....\myfifo_10_wave0.jpg
...........................\............\.........\....\myfifo_10_waveforms.html
...........................\............\.........\....\myfifo_8.v
...........................\............\.........\....\myfifo_8_bb.v
...........................\............\.........\....\myfifo_8_wave0.jpg
...........................\............\.........\....\myfifo_8_waveforms.html
...........................\............\.........\dev\chip_editor.acv
...........................\............\.........\...\cmp_state.ini
...........................\............\.........\...\db\add_sub_1jh.tdf
...........................\............\.........\...\..\add_sub_dhh.tdf
...........................\............\.........\...\..\add_sub_ehh.tdf
...........................\............\.........\...\..\add_sub_fhh.tdf
...........................\............\.........\...\..\add_sub_ihh.tdf
...........................\............\.........\...\..\add_sub_rih.tdf
...........................\............\.........\...\..\altsyncram_apb1.tdf
...........................\............\.........\...\..\altsyncram_mmb1.tdf
...........................\............\.........\...\..\a_dpfifo_4nl.tdf
...........................\............\.........\...\..\a_dpfifo_rll.tdf
...........................\............\.........\...\..\a_fefifo_qve.tdf
...........................\............\.........\...\..\dpram_81k.tdf
...........................\............\.........\...\..\dpram_h2k.tdf
...........................\............\.........\...\..\scfifo_eaq.tdf
...........................\............\.........\...\..\scfifo_nbq.tdf
...........................\............\.........\...\..\uart_regs-sim.vwf
...........................\............\.........\...\..\uart_regs.asm.qmsg
...........................\............\.........\...\..\uart_regs.cmp.cdb
...........................\............\.........\...\..\uart_regs.cmp.hdb
...........................\............\.........\...\..\uart_regs.cmp.rdb
...........................\............\.........\...\..\uart_regs.csf.qmsg
...........................\............\.........\...\..\uart_regs.db_info
...........................\............\.........\...\..\uart_regs.fit.qmsg
...........................\............\.........\...\..\uart_regs.fld
...........................\............\.........\...\..\uart_regs.fnsim.cdb
...........................\............\.........\...\..\uart_regs.fnsim.hdb
...........................\............\.........\...\..\uart_regs.hif
...........................\............\.........\...\..\uart_regs.icc
...........................\............\.........\...\..\uart_regs.map.cdb
...........................\............\.........\...\..\uart_regs.map.hdb
...........................\............\.........\...\..\uart_regs.