文件名称:MAC

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [HTML]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 775kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • sa***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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this a Multiplier and Accumulate (MAC). written in VHDL-this is a Multiplier and Accumulate (MAC). written in VHDL
相关搜索: accumulate
vhdl
mac
vhdl

(系统自动生成,下载前可以参看下载内容)

下载文件列表

MAC\.lso

...\adder8_test.cmd_log

...\adder8_test.lso

...\adder8_test.prj

...\adder8_test.stx

...\adder8_test.syr

...\adder8_test.vhd

...\adder8_test.vhd.bak

...\adder8_test.xst

...\adder8_test_summary.html

...\adder8_test_vhdl.prj

...\adder8_test_xst.xrpt

...\full_adder8.vhd

...\MAC.gise

...\MAC.ise

...\MAC.xise

...\..._xdb\cst.xbcd

...\.......\tmp\ise\version

...\.......\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject

...\.......\...\...\............\..................\.........\HDProject_StrTbl

...\.......\...\...\............\PnAutoRun\Scripts\RunOnce_tcl

...\.......\...\...\............\.........\.......\RunOnce_tcl_StrTbl

...\.......\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main

...\.......\...\...\............\................\................\dpm_project_main_StrTbl

...\.......\...\...\............\................Gui\CViewSelector

...\.......\...\...\............\...................\CViewSelector_StrTbl

...\.......\...\...\............\...................\File-SynthesisOnly

...\.......\...\...\............\...................\File-SynthesisOnly_StrTbl

...\.......\...\...\............\...................\Library-SynthesisOnly

...\.......\...\...\............\...................\Library-SynthesisOnly_StrTbl

...\.......\...\...\............\...................\Process-SynthesisOnly-

...\.......\...\...\............\...................\Process-SynthesisOnly-DESUT_SCHEMATIC

...\.......\...\...\............\...................\Process-SynthesisOnly-DESUT_SCHEMATIC_StrTbl

...\.......\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE

...\.......\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE_StrTbl

...\.......\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_PACKAGE_DECL

...\.......\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_PACKAGE_DECL_StrTbl

...\.......\...\...\............\...................\Process-SynthesisOnly-_StrTbl

...\.......\...\...\............\...................\Source-SynthesisOnly-AutoCompile

...\.......\...\...\............\...................\Source-SynthesisOnly-AutoCompile_StrTbl

...\.......\...\...\............\xreport\Gc_RvReportViewer-Current-Module

...\.......\...\...\............\.......\Gc_RvReportViewer-Current-Module_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-adder8_test

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-adder8_test_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-my_adder

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-My_adder8

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-My_adder8_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-my_adder_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-my_and2

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-my_and2_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-my_halfadder

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-Data-my_halfadder_StrTbl

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default

...\.......\...\...\............\.......\Gc_RvReportViewer-Module-DataFactory-Default_StrTbl

...\.......\...\...\..REGISTRY__\Autonym\regkeys

...\.......\...\...\............\bitgen\regkeys

...\.......\...\...\............\...init\regkeys

...\.......\...\...\............\common\regkeys

...\.......\...\...\............\.pldfit\regkeys

...\.......\...\...\............\dumpngdio\regkeys

...\.......\...\...\............\fuse\regkeys

...\.......\...\...\............\HierarchicalDesign\HDProject\regkeys

...\.......\...\...\............\..................\regkeys

...\.......\...\...\............\hprep6\regkeys

...\.......\...\...\............\idem\regkeys

...\.......\...\...\............\libgen\regkeys

...\.......\...\...\............\map\regkeys

...\.......\...\...\............\netgen\regkeys

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