文件名称:dig_pll
介绍说明－－下载内容均来自于网络，请自行研究使用
一个简易的数字锁相环，可以产生一个与输入同频同相的输出时钟-A simple digital PLL can generate an input in phase with the same frequency output clock
相关搜索： 数字锁相环
(系统自动生成,下载前可以参看下载内容)
下载文件列表
数字琐相环DPLL的VERLOG代码\dll\dll.cr.mti
..........................\...\dll.mpf
..........................\...\dll.v
..........................\...\test_dll.v
..........................\...\transcript
..........................\...\vsim.wlf
..........................\...\work\@p@l@l\verilog.asm
..........................\...\....\......\_primary.dat
..........................\...\....\......\_primary.vhd
..........................\...\....\test_dll\verilog.asm
..........................\...\....\........\_primary.dat
..........................\...\....\........\_primary.vhd
..........................\...\....\_info
..........................\使用说明请参看右侧注释====〉〉.txt
..........................\dll\work\@p@l@l
..........................\...\....\test_dll
..........................\...\work
..........................\dll
数字琐相环DPLL的VERLOG代码
..........................\...\dll.mpf
..........................\...\dll.v
..........................\...\test_dll.v
..........................\...\transcript
..........................\...\vsim.wlf
..........................\...\work\@p@l@l\verilog.asm
..........................\...\....\......\_primary.dat
..........................\...\....\......\_primary.vhd
..........................\...\....\test_dll\verilog.asm
..........................\...\....\........\_primary.dat
..........................\...\....\........\_primary.vhd
..........................\...\....\_info
..........................\使用说明请参看右侧注释====〉〉.txt
..........................\dll\work\@p@l@l
..........................\...\....\test_dll
..........................\...\work
..........................\dll
数字琐相环DPLL的VERLOG代码