文件名称:YIM
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一、实验目的
掌握I/O地址译码电路的工作原理。
二、实验原理和内容
译码输出端Y0～Y7在实验台上“I/O地址当CPU执行I/O指令且地址在280H～2BFH范围内，译码器选中，必有一根译码线输出负脉冲。利用这个负脉冲控制L7闪烁发光（亮、灭、亮、灭、……），时间间隔通过软件延时实现。
三、编程提示
1、实验电路中D触发器CLK端输入脉冲时，上升沿使Q端输出高电平L7发光，CD端加低电平L7灭。-1, experiment aims to master I/O address decoding circuitry works. 2, experimental principle and content of the decoder outputs Y0 ~ Y7 in the experimental stage, " I/O address when the CPU implementation of the I/O instruction and the address is 280H ~ 2BFH within the decoder is selected, there must be a decoding line output negative pulse. take advantage of this negative impulse control L7 flashing LED (light, eliminate, brighter, silencers, ... ...), time interval delay achieved through software. 3, programming tips an experimental circuit D flip-flop CLK-ended input pulse when the rising edge so that Q-ended output high L7 LED, CD-side plus low L7 destroy.
掌握I/O地址译码电路的工作原理。
二、实验原理和内容
译码输出端Y0～Y7在实验台上“I/O地址当CPU执行I/O指令且地址在280H～2BFH范围内，译码器选中，必有一根译码线输出负脉冲。利用这个负脉冲控制L7闪烁发光（亮、灭、亮、灭、……），时间间隔通过软件延时实现。
三、编程提示
1、实验电路中D触发器CLK端输入脉冲时，上升沿使Q端输出高电平L7发光，CD端加低电平L7灭。-1, experiment aims to master I/O address decoding circuitry works. 2, experimental principle and content of the decoder outputs Y0 ~ Y7 in the experimental stage, " I/O address when the CPU implementation of the I/O instruction and the address is 280H ~ 2BFH within the decoder is selected, there must be a decoding line output negative pulse. take advantage of this negative impulse control L7 flashing LED (light, eliminate, brighter, silencers, ... ...), time interval delay achieved through software. 3, programming tips an experimental circuit D flip-flop CLK-ended input pulse when the rising edge so that Q-ended output high L7 LED, CD-side plus low L7 destroy.
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下载文件列表
实验01_IO地址译码.txt
实验01_IO地址译码.ylt.gif
实验01_IO地址译码.ylt.gif