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............\................\...\...\............\................Gui\File-SynthesisOnly

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............\................\...\...\............\HierarchicalDesign\HDProject\HDProject

............\................\...\...\............\..................\.........\HDProject_StrTbl

............\................\...\...\............\ProjectNavigatorGui\Library-SynthesisOnly

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............\................\...\...\............\...................\Process-BehavioralSim-

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............\................\...\...\............\...................\Process-SynthesisOnly-DESUT_VHDL_ARCHITECTURE_StrTbl

............\................\...\...\............\...................\Process-SynthesisOnly-_StrTbl

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