文件名称:s3ask_ddr2

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.49mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • Joe****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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DDR2-400样例源代码,用于Xilinx Spartan 3A/3AN Starter Kit-DDR2-400 sample source code for Xilinx Spartan 3A/3AN Starter Kit
(系统自动生成,下载前可以参看下载内容)

下载文件列表

framebuf

........\bitmap.mcs

........\implement

........\.........\framebuf_routed.bit

........\.........\framebuf_routed.mcs

........\.........\implement.bat

........\.........\implement.ifn

........\.........\implement.prj

........\readme.txt

........\source

........\......\autopilot.v

........\......\crc32_4bit.v

........\......\framebuf.ucf

........\......\framebuf.v

........\......\graphics

........\......\........\cursor_pair.v

........\......\........\fbctime.v

........\......\........\linebuf.v

........\......\picoblze

........\......\........\readme.txt

........\......\........\uart_tx_plus.v

........\......\picocode

........\......\........\assemble.bat

........\......\........\control.psm

........\......\........\control.v

........\......\........\readme.txt

........\......\picouser

........\......\........\debnce.v

........\......\........\picouser.v

........\......\........\spinner.v

........\......\........\synchro.v

........\......\rs232reg

........\......\........\rs232reg.v

........\......\........\vregcode

........\......\........\........\assemble.bat

........\......\........\........\readme.txt

........\......\........\........\vregsw.psm

........\......\........\........\vregsw.v

........\......\sdramtst

........\......\........\vlog_xst_bl4.v

........\......\........\vlog_xst_bl4_addr_gen_0.v

........\......\........\vlog_xst_bl4_cal_ctl_0.v

........\......\........\vlog_xst_bl4_cal_top.v

........\......\........\vlog_xst_bl4_clk_dcm.v

........\......\........\vlog_xst_bl4_cmd_fsm_0.v

........\......\........\vlog_xst_bl4_cmp_data_0.v

........\......\........\vlog_xst_bl4_controller_0.v

........\......\........\vlog_xst_bl4_controller_iobs_0.v

........\......\........\vlog_xst_bl4_data_path_0.v

........\......\........\vlog_xst_bl4_data_path_iobs_0.v

........\......\........\vlog_xst_bl4_data_path_rst.v

........\......\........\vlog_xst_bl4_data_read_0.v

........\......\........\vlog_xst_bl4_data_read_controller_0.v

........\......\........\vlog_xst_bl4_data_write_0.v

........\......\........\vlog_xst_bl4_ddr2_dm_0.v

........\......\........\vlog_xst_bl4_ddr2_test_bench_0.v

........\......\........\vlog_xst_bl4_dqs_delay.v

........\......\........\vlog_xst_bl4_fifo_0_wr_en_0.v

........\......\........\vlog_xst_bl4_fifo_1_wr_en_0.v

........\......\........\vlog_xst_bl4_infrastructure.v

........\......\........\vlog_xst_bl4_infrastructure_iobs_0.v

........\......\........\vlog_xst_bl4_infrastructure_top_0.v

........\......\........\vlog_xst_bl4_iobs_0.v

........\......\........\vlog_xst_bl4_lfsr32_0.v

........\......\........\vlog_xst_bl4_main_0.v

........\......\........\vlog_xst_bl4_parameters_0.v

........\......\........\vlog_xst_bl4_RAM8D_0.v

........\......\........\vlog_xst_bl4_RAM8D_1.v

........\......\........\vlog_xst_bl4_rd_gray_ctr.v

........\......\........\vlog_xst_bl4_s3_ddr_iob.v

........\......\........\vlog_xst_bl4_s3_dqs_iob.v

........\......\........\vlog_xst_bl4_tap_dly_0.v

........\......\........\vlog_xst_bl4_top_0.v

........\......\........\vlog_xst_bl4_wr_gray_ctr.v

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