文件名称:baseband_verilog
介绍说明－－下载内容均来自于网络，请自行研究使用
verilog实现的基带信号编码，整个系统分为六个模块，分别为：时钟模块,待发射模块,卷积模块,扩频模块,极性变换和内插模块,成型滤波器-verilog implementation baseband signal coding, the entire system is divided into six modules, namely: the clock module, to be launched modules, convolution module, spread spectrum modules, polarity transform and interpolation modules, forming filter
(系统自动生成,下载前可以参看下载内容)
下载文件列表
baseband_verilog
................\accumulator.v
................\carrier_mixer.v
................\carrier_nco.v
................\code_gen2.v
................\code_nco.v
................\epoch_counter.v
................\gps_baseband.v
................\lgpl.txt
................\time_base.v
................\tracking_channel.v
................\accumulator.v
................\carrier_mixer.v
................\carrier_nco.v
................\code_gen2.v
................\code_nco.v
................\epoch_counter.v
................\gps_baseband.v
................\lgpl.txt
................\time_base.v
................\tracking_channel.v