文件名称:ADScode
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这是《ADS应用详解——射频电路设计与仿真》这本书的源代码，对大家有帮助的！-This is the " ADS application Xiang Jie- RF circuit design and simulation," This is the book' s source code to all of us help!
相关搜索： ADS
ADScode
rar
ADScode
射频
ADS
Design
rf
simulation
射频
电路设计
design
a
circuit
with
ADS
RF
Design
ADS
circuit
ADScode
rar
ADScode
射频
ADS
Design
rf
simulation
射频
电路设计
design
a
circuit
with
ADS
RF
Design
ADS
circuit
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下载文件列表
ADS——code
...........\divider_prj
...........\...........\arf_ful.rec
...........\...........\data
...........\...........\....\diviver.ds
...........\...........\....\diviver_mom.ds
...........\...........\....\diviver_mom_a.ds
...........\...........\de_sim.cfg
...........\...........\de_sim.cfg.old
...........\...........\diviver.dds
...........\...........\dsp_ful.rec
...........\...........\hpeesofsim.cfg
...........\...........\hpeesofsim.cfg.old
...........\...........\layout.prf
...........\...........\mm_layout.prf
...........\...........\mm_schematic.prf
...........\...........\Momentum_diviver_mom.dds
...........\...........\momServer.log
...........\...........\mom_dsn
...........\...........\.......\diviver
...........\...........\.......\.......\proj
...........\...........\.......\.......\proj.afs
...........\...........\.......\.......\proj.c2d
...........\...........\.......\.......\proj.cct
...........\...........\.......\.......\proj.cdr
...........\...........\.......\.......\proj.cfg
...........\...........\.......\.......\proj.cti
...........\...........\.......\.......\proj.cvi
...........\...........\.......\.......\proj.fra
...........\...........\.......\.......\proj.gdf
...........\...........\.......\.......\proj.lmd
...........\...........\.......\.......\proj.lmp
...........\...........\.......\.......\proj.log
...........\...........\.......\.......\proj.mrp
...........\...........\.......\.......\proj.msh
...........\...........\.......\.......\proj.opt
...........\...........\.......\.......\proj.qry
...........\...........\.......\.......\proj.rat
...........\...........\.......\.......\proj.sam
...........\...........\.......\.......\proj.sta
...........\...........\.......\.......\proj.std
...........\...........\.......\.......\proj.sti
...........\...........\.......\.......\proj.stm
...........\...........\.......\.......\proj.sub
...........\...........\.......\.......\proj.tch
...........\...........\.......\.......\proj.tml
...........\...........\.......\.......\proj_a
...........\...........\netlist.log
...........\...........\networks
...........\...........\........\diviver.ael
...........\...........\........\diviver.atf
...........\...........\........\diviver.dsn
...........\...........\........\diviver.lay
...........\...........\readegs.dat
...........\...........\readegs.log
...........\...........\save_project_state.ael
...........\...........\save_project_state.bak
...........\...........\schematic.prf
...........\...........\substrates
...........\...........\..........\sub0000.ndx
...........\...........\synthesis
...........\...........\verification
...........\filter_lpf_prj
...........\..............\arf_ful.rec
...........\..............\data
...........\..............\....\filter_lpf.ds
...........\..............\de_sim.cfg
...........\..............\de_sim.cfg.old
...........\..............\dsp_ful.rec
...........\..............\filter_lpf.dds
...........\..............\hpeesofsim.cfg
...........\..............\hpeesofsim.cfg.old
...........\..............\layout.prf
...........\..............\mm_layout.prf
...........\..............\mm_schematic.prf
...........\..............\momServer.log
...........\..............\mom_dsn
...........\..............\netlist.log
...........\..............\networks
...........\..............\........\DA_LCLowpassDT1_filter_lpf.ael
...........\..............\........\DA_LCLowpassDT1_filter_lpf.atf
...........\..............\........\DA_LCLowpassDT1_filter_lpf.dsn
...........\..............\........\filter_lpf.ael
...........\..............\........\filter_lpf.atf
...........\..............\........\filter_lpf.dsn
...........\..............\save_project_state.ael
...........\..............\save_project_state.bak
...........\..............\schematic.prf
...........\..............\synthesis
...........\..............\verification
...........\filter_microtrip_prj
...........\....................\arf_ful.rec
...........\....................\data
...........\....................\....\filter_microchip.ds
...........\................
...........\divider_prj
...........\...........\arf_ful.rec
...........\...........\data
...........\...........\....\diviver.ds
...........\...........\....\diviver_mom.ds
...........\...........\....\diviver_mom_a.ds
...........\...........\de_sim.cfg
...........\...........\de_sim.cfg.old
...........\...........\diviver.dds
...........\...........\dsp_ful.rec
...........\...........\hpeesofsim.cfg
...........\...........\hpeesofsim.cfg.old
...........\...........\layout.prf
...........\...........\mm_layout.prf
...........\...........\mm_schematic.prf
...........\...........\Momentum_diviver_mom.dds
...........\...........\momServer.log
...........\...........\mom_dsn
...........\...........\.......\diviver
...........\...........\.......\.......\proj
...........\...........\.......\.......\proj.afs
...........\...........\.......\.......\proj.c2d
...........\...........\.......\.......\proj.cct
...........\...........\.......\.......\proj.cdr
...........\...........\.......\.......\proj.cfg
...........\...........\.......\.......\proj.cti
...........\...........\.......\.......\proj.cvi
...........\...........\.......\.......\proj.fra
...........\...........\.......\.......\proj.gdf
...........\...........\.......\.......\proj.lmd
...........\...........\.......\.......\proj.lmp
...........\...........\.......\.......\proj.log
...........\...........\.......\.......\proj.mrp
...........\...........\.......\.......\proj.msh
...........\...........\.......\.......\proj.opt
...........\...........\.......\.......\proj.qry
...........\...........\.......\.......\proj.rat
...........\...........\.......\.......\proj.sam
...........\...........\.......\.......\proj.sta
...........\...........\.......\.......\proj.std
...........\...........\.......\.......\proj.sti
...........\...........\.......\.......\proj.stm
...........\...........\.......\.......\proj.sub
...........\...........\.......\.......\proj.tch
...........\...........\.......\.......\proj.tml
...........\...........\.......\.......\proj_a
...........\...........\netlist.log
...........\...........\networks
...........\...........\........\diviver.ael
...........\...........\........\diviver.atf
...........\...........\........\diviver.dsn
...........\...........\........\diviver.lay
...........\...........\readegs.dat
...........\...........\readegs.log
...........\...........\save_project_state.ael
...........\...........\save_project_state.bak
...........\...........\schematic.prf
...........\...........\substrates
...........\...........\..........\sub0000.ndx
...........\...........\synthesis
...........\...........\verification
...........\filter_lpf_prj
...........\..............\arf_ful.rec
...........\..............\data
...........\..............\....\filter_lpf.ds
...........\..............\de_sim.cfg
...........\..............\de_sim.cfg.old
...........\..............\dsp_ful.rec
...........\..............\filter_lpf.dds
...........\..............\hpeesofsim.cfg
...........\..............\hpeesofsim.cfg.old
...........\..............\layout.prf
...........\..............\mm_layout.prf
...........\..............\mm_schematic.prf
...........\..............\momServer.log
...........\..............\mom_dsn
...........\..............\netlist.log
...........\..............\networks
...........\..............\........\DA_LCLowpassDT1_filter_lpf.ael
...........\..............\........\DA_LCLowpassDT1_filter_lpf.atf
...........\..............\........\DA_LCLowpassDT1_filter_lpf.dsn
...........\..............\........\filter_lpf.ael
...........\..............\........\filter_lpf.atf
...........\..............\........\filter_lpf.dsn
...........\..............\save_project_state.ael
...........\..............\save_project_state.bak
...........\..............\schematic.prf
...........\..............\synthesis
...........\..............\verification
...........\filter_microtrip_prj
...........\....................\arf_ful.rec
...........\....................\data
...........\....................\....\filter_microchip.ds
...........\................