文件名称:JDL12864LCD
介绍说明－－下载内容均来自于网络，请自行研究使用
基于Actel A3P030 FPGA，液晶采用JDL12864串行接口，时钟48MHz-Based on Actel A3P030 FPGA, LCD using JDL12864 serial interface, clock 48MHz
(系统自动生成,下载前可以参看下载内容)
下载文件列表
hdl
...\12864_Controller.v
...\CLK_DIV.v
...\C_12864.v
...\Data_Generator.v
...\Decoder.v
...\JDL12864_test.v
...\Reseter.v
...\Shift_24bit.v
...\说明.txt
...\12864_Controller.v
...\CLK_DIV.v
...\C_12864.v
...\Data_Generator.v
...\Decoder.v
...\JDL12864_test.v
...\Reseter.v
...\Shift_24bit.v
...\说明.txt